The MPF102 N-Channel JFET is a long-standing favorite in analog electronics, valued for its high input impedance, low noise characteristics, and accessible design simplicity. This article will highlight pinout details, specifications, features, applications, and limitations of the MPF102 N-Channel JFET.

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MPF102 N-Channel JFET Basics

The MPF102 is a classic N-channel JFET known for its high input impedance and low-noise performance. As a depletion-mode device, it conducts with zero gate-source voltage and reduces current flow as a negative gate voltage is applied. Its typical characteristics - such as IDSS ranging roughly from 2 to 20 mA and a pinch-off voltage near –3 V - make it versatile for analog designs.

Its simple biasing requirements, especially in self-bias configurations, allow straightforward implementation in common-source or source-follower stages. With low gate capacitance and modest power dissipation needs, the MPF102 remains a popular choice for anyone working on lightweight analog circuitry despite being an older, now-obsolete component.

If you are interested in purchasing the MPF102 N-Channel JFET, feel free to contact us for pricing and availability.

MPF102 Alternatives & Equivalents

MPF102 Pinout Description

MPF102 Specifications

Absolute Maximum Ratings

Electrical Characteristics

MPF102 N-Channel JFET Features

N-channel JFET (Junction Field-Effect Transistor)

Low-noise amplifier device

High input impedance

Drain-source voltage (VDS max): typically around 25V

Gate-source cutoff voltage (VGS(off)): approx −0.5V to −8V

Drain current (IDSS): typically 2 mA to 20 mA

Low gate leakage current

Through-hole TO-92 package

Using MPF102 N-Channel JFET

The MPF102 is an N-channel JFET that naturally conducts when its gate-to-source voltage (VGS) is zero, meaning the device is normally on. In the left diagram, the gate is tied to ground, so the source is also at ground potential and VGS = 0. Because no reverse-bias is applied to the gate, the JFET channel remains open and current flows from the +5 V supply through the LED and then through the JFET to ground, lighting the LED. In the right diagram, the gate is pulled to –7.5 V, creating a strong reverse-bias on the gate. This negative VGS pinches off the channel, turning the JFET off. As a result, no current flows through the LED, and it stays dark. This demonstrates the basic use of the MPF102: the gate voltage controls conduction, with zero or small negative gate voltage turning it on, and sufficiently negative voltage turning it off.

MPF102 Characteristics Curves

Figure 1 – Input Admittance (y₍ᵢₛ₎)

The input admittance curve shows how easily AC signals can enter the gate-to-source path of the MPF102. As frequency increases, both the input conductance (gᵢₛ) and input susceptance (bᵢₛ) rise, meaning the device draws more AC input current at high frequencies. The susceptance component grows mainly because of the JFET’s internal capacitances, which become more dominant at RF frequencies. These curves reveal that the MPF102 presents a light load at low frequencies but becomes progressively more reactive and conductive as frequency climbs.

Figure 2 – Reverse Transfer Admittance (yᵣₛ)

The reverse transfer admittance curve describes how much signal leaks backward from the drain to the gate. Even though both the conductance (gᵣₛ) and susceptance (bᵣₛ) increase with frequency, their values remain very small, indicating that the MPF102 offers good reverse isolation. This means unwanted feedback from the output to the input is minimal, which is important for stable RF amplifier designs. The curve also shows operation at two drain currents (I_DSS and 0.25 I_DSS), helping designers see how reverse coupling behaves under different bias levels.

Figure 3 – Forward Transfer Admittance (y₍