NOR flash was first developed by Intel in 1988, and after so many years of development, it is widely used in various computers and embedded products. NOR and NAND is the two main types of non-volatile memory in the market today.

Ⅰ What is NOR flash?

NOR flash is one of the two major non-volatile flash memory technologies in the market, Intel first developed NOR flash technology in 1988, which revolutionized the original EPROM (Erasable Programmable Read-Only-Memory) and EEPROM (Electrically Erasable Read-Only-Memory). In 1989, Toshiba released the NAND Flash architecture, which emphasized lower cost per bit, higher performance, and easy upgradeability through an interface like a disk.

NOR flash

NOR flash memory has high transfer efficiency and is cost-effective at small capacities of 1 to 4MB, but the very low write and erase speeds greatly affect its performance. The NAND architecture provides a very high cell density, allowing high storage density and fast write and erase speeds. The difficulty in applying NAND is that the management of Flash requires a special system interface. Usually, the reading speed of NOR is slightly faster than NAND, while in terms of writing, NAND is much faster than NOR, and these cases should be considered in the design. (NOR flash wiki)

Ⅱ Structure and Principle of NOR flash

Both NOR flash and NAND flash use a three-terminal device containing source, drain, and gate as the memory cell. This three-terminal device works similarly to a field-effect transistor, using voltage to control the on/off between the source and drain, with minimal current consumption at the gate. The floating gate consists of a nitride sandwiched between two layers of silicon dioxide material, the middle nitride is a charge potential well that can store charge. The thickness of the upper and lower oxide layers is greater than 50Å, which prevents breakdown.

The process of injecting charge into the charge potential well is the process of writing data to the memory cell. There are two techniques for writing data: hot electron injection, which charges the floating gate through the source (NOR uses this method to charge the floating gate), and the F-N tunneling effect, which charges the floating gate through the silicon base (NAND uses this method to charge the floating gate).

It is worth noting that before writing new data, the original data must be erased, i.e., the charge to the floating gate must first be discharged, and both types of Flash are discharged through the F-N tunneling effect.

Injecting charge into the floating gate means that data "0" is written, and not injecting charge means that data "1" is written, so erasing the Flash data is writing data "1". For a cell with charge in the floating gate, a positively charged space charge region will be formed between the source and drain due to the induction of the floating gate, and the transistor will be on regardless of whether a bias voltage is applied to the control pole. For a transistor without charge in the floating gate, the source and drain can only conduct when there is a proper bias voltage applied to the control electrode to induce a charge on the silicon base, which means that the transistor is cut off when no bias voltage is applied to the control electrode.

If the source of the transistor is grounded and the drain is connected to the bit line, the data in the memory cell can be obtained by detecting the conduction state of the transistor without bias voltage. If the level on the bit line is low, the transistor is in conduction state and the data read is "0"; if the level on the bit line is high, the transistor is in cutoff state and the data read is "1". Because the voltage applied to the control gate in the process of reading data is small or not necessary, it is not enough to change the original charge in the floating gate, so the reading operation will not change the original data in the flash memory.

Each memory cell of NOR flash is connected in parallel to a bit line, which facilitates random access to each bit. With a proprietary address line, which enables one-time addressing, flash has a short execution time for processor instructions.

Ⅲ Performance

When writing and erasing data, NAND flash supports whole block shoe operation, so the speed is much faster than NOR flash. When reading data, because NAND has to send address information to the chip for addressing before it can start reading and writing data. This address information includes block number, intra-block page number, and intra-page byte number, etc., which has to be selected sequentially to locate the byte to be operated. So each data access needs to go through three times Addressing, at least three clock cycles; while NOR operation is carried out in words or bytes, direct reading, so read data NOR is much faster than NAND.

Each memory cell of NOR flash is connected to a bit line, which increases the number of bit lines in the chip, which is not conducive to the increase of storage density. With the same area and process, the capacity of NAND is much larger than that of NOR, which is cheaper to produce and easier to produce high-capacity chips.

Flash will cause oxidative degradation of the media when writing and erasing data, leading to chip aging, especially in NOR. This problem is particularly acute, so it is not suitable for frequent erasure.

Ⅳ NOR's working timings

Timing of read operation of S29GLxxxN

The above diagram is the timing of the read operation of Spansion's S29GLxxxN. First, the addressing signal is sent from the address, and when the signal is stable, CE# (Chip Enalbe, low active) becomes low in the active state, then OE# (Output Enable, low active) becomes low in the active state, and then the data can be output through the data line. During this process, the WE# (Write Enabel, Low Active) signal is always high and inactive.

NOR addressing process

The diagram above reflects the addressing process of NOR, where Amax-A3 selects the page address and A2-A0 selects the inland page address. In the figure, it should be A23-A3.

The NOR write process is similar to the read process, where OE# is high and WE# is low during the write process.

Ⅴ CFI

When talking about Flash, it is impossible not to mention a concept CFI, the Common Flash Interface. Since the birth of Flash, his application has become more and more widespread. Since there are many manufacturers producing Flash, the operating command set electrical parameters of Flash products from different manufacturers vary, which brings a lot of inconvenience to Flash developers and designers, and OEM manufacturers.

In order to upgrade the existing Flash products or replace them with Flash products from other companies, the original program code and hardware structure must be modified. To solve the above problems, CFI was born, which is an open standard interface to read data from Flash devices. He enables the system software to query the installed Flash devices for various parameters, including device array structure parameters, electrical and timing parameters, and device supported functions. Using CFI allows new and improved products to be used instead of older versions without modifying the system software. To determine if a Flash device is CFI enabled, the system software first writes data 98H to address 55H of the Flash device through the CUI (Command User Interface), and then reads the contents of three memory cells consecutively through the data bus starting from address 10H of the device. If the data bus returns the characters of the three memory cells as "Q", "R", and "Y", the device is CFI enabled.

Ⅵ NOR flash vs. NAND flash

1. The basic unit of read and write is different. Application programs operate on NOR flash with "words" as the basic unit. Application programs operate on NAND flash with "blocks" as the basic unit. To modify a byte in a NAND flash, the entire block must be rewritten.

2. NOR flash memory is a random storage medium, which is used for small amounts of data; NAND flash memory is a continuous storage medium, which is suitable for storing large amounts of data.

3. NOR address lines and data lines are separated, so NOR flash can be connected to data lines just like SRAM. NOR flash is also used similarly to usual memory chips in that they are highly efficient in transfer and executable programs can be executed within the chip ( XI P, eXecute In Place) so that applications can run directly within the flash memory without having to read the code into the system RAM. Because of this feature of NOR, NOR flash is often used as boot chips in embedded systems. NAND shares the address and data bus and requires some additional control inputs and outputs, so it is difficult to directly use NAND flash as the boot chip.

4. The storage density of NOR is low, so the cost of storing a byte is also higher, while the storage density and storage capacity of NAND flash memory is higher.

The chart below is a feature comparison of NAND vs NOR flash

Ⅶ What is NOR flash used for?

The NOR flash market has been growing by leaps and bounds in the last year or two. This growth rate is mainly driven by the demand for automotive electronics and IoT, 5G, and smartphones and their peripherals (such as TWS headphones and wearable devices).

(1) Consumer electronics: Smartphones and peripherals are also generating significant demand for NOR flash. For example, smartphones and wearable devices with Bluetooth headphones / smart audio, etc... These devices need to collect user data information, such as location information, heart rate information, etc... On the other hand, they also need to transmit external data to the user, such as music, video, and calls, etc... These are inseparable from the support of the NOR flash code memory chip. By 2021, only the TWS headset can bring $580 million markets for NOR flash.

(2) IoT: Along with the high-density layout of 5G base stations, IoT will be a long-term boon for NOR flash. The data flow in the era of the Internet of Everything is constant, and various data interactions between people, between people and devices, between people and cloud servers, and between devices and equipment will generate massive amounts of IoT nodes and the devices corresponding to these nodes will use NOR flash.

(3) Automotive: From small car cameras to advanced driver assistance systems (ADAS), there is a large demand for NOR flash. By 2021, the market space for NOR flash in ADAS alone will reach $670 million.

(4) Industrial sector: For example, the three-meter market (plus the northern heat meter) has a rising demand for NOR flash, where the purchase of NOR flash based on the latest specification of IR46 smart meters will appear soon.

(5) 5G, communication equipment: 5G base stations, micro base stations have given rise to a variety of node devices, 5G also accelerates the development of industrial Internet of Things, Internet of Vehicles, autonomous driving, edge computing. These applications are inseparable from NOR flash. In 2020, it will reach $120 million, and in 2021, it will reach $220 million.

(6) Cell phone screen: mainly in TDDI (touch and display driver integration) for small capacity 2Mb/4Mb NOR flash adoption and AMOLED for 8Mb-32Mb NOR flash demand increases.

AMOLED requires an external 8Mb (Full HD) or 32Mb (QHD) NOR flash for optical compensation, while full-screen cell phones tend to adopt TDDI solutions, which require an external NOR flash for storing the fractional codes required for touch functions.