Ⅰ Introduction of eFPGA

eFPGA (Embedded FPGA) embeds one or more FPGAs in the form of IP into chips such as ASIC, ASSP, or SoC. This IP can be licensed for use, and its use is similar to other IPs used in semiconductor design.

In other words, an eFPGA is a digitally reconfigurable structure consisting of programmable logic in a programmable interconnect, typically behaving as a rectangular array with data inputs and outputs located around the edges. eFPGAs typically have hundreds or thousands of inputs and outputs that can be connected to buses, data paths, control paths, GPIOs, PHYs, or whatever device is needed.

Why are eFPGAs attracting so much attention? There are two main points: First, development costs are rising dramatically with each new process generation. These are driven by the complexity of the abstract designs themselves and the physical implementation of these designs in actual SoC devices, including items such as software tools, engineering time, and mask costs. Second (and conversely), the cost per unit of the functionality of these devices has been declining. For example, two or three decades ago, FPGA gates were relatively expensive, so FPGA devices tended to be used for prototyping and pre-production rather than mass production applications. So previous attempts to add FPGA gates to ASICs typically increased the overall die size and complexity to the point where new hybrid devices would become too expensive to be practical.

eFPGA in SoC

The high cost involved in SoC design increases the risk associated with not having the right product to meet a specific market need, while the relatively low cost of FPGA gates means that embedding FPGA technology allows a degree of design flexibility (and therefore reduced market risk) that makes economic sense.

Unlike the design process for standalone FPGAs, eFPGA designers can select the exact amount of logic, DSP, and memory resources required for their customers' applications. When moving into high volume production, eFPGAs can also reduce system cost, power consumption, and board space by eliminating standalone FPGAs.

Ⅱ Advantages of eFPGAs

Compared to FPGAs, eFPGAs offer the following advantages.

Higher performance: eFPGAs connect to ASICs through a wide range of parallel interfaces, thus providing higher throughput with latency measured in single-digit clock cycles.

Lower power: Programmable I/O circuits account for half of the total power consumption of a standalone FPGA. eFPGAs have a direct wired connection to the SoC, thereby eliminating large programmable I/O buffers altogether. The eFPGA can be sized precisely to your requirements, and you can adjust processing techniques to weigh performance versus power consumption.

Lower system cost: eFPGAs have a much smaller core size than standalone FPGAs-eliminating programmable I/O buffers, unused DSP and memory modules, and over-provisioned LUTs and registers. Traditional FPGAs have large pin counts and tight pin spacing, so you must build multi-layer PCBs. Embedded FPGAs eliminate the need for dedicated PCBs and all supporting components such as power conditioners, clock generators, level converters, and passive components.

Higher system reliability and yield: Integrating FPGA functionality into an ASIC improves system-level signal integrity and eliminates the reliability and yield losses associated with mounting a standalone FPGA on a PCB.

eFPGAs are now available from multiple suppliers, a variety of foundries (TSMC, Lattice, SMIC, and Samsung), and process nodes (e.g. 180, 40, 28, 22, 16, 14, 12 and 7nm).

Ⅲ Players in the eFPGA

By today, the eFPGA concept has gained widespread industry acceptance, and the number of companies in the space is slowly becoming larger.

FlexLogix

FlexLogix is a pioneer in eFPGAs, offering solutions for building flexible chips and accelerating neural network inference. Its eFPGA platform enables chips with the flexibility to handle changing protocols, standards, algorithms, and customer requirements and enables reconfigurable gas pedals that can speed up critical workloads by 30 to 100 times compared to processors.

QuickLogic

QuickLogic is an established FPGA vendor focused on developing low-power, multi-core semiconductor platforms and intellectual property ("IP") for artificial intelligence ("AI"), voice, and sensor processing. Its main market is the ultra-low power SoC market, such as Bluetooth, IoT, etc. Its eFPGAs will bring configurability to these ultra-low power SoCs, resulting in better power and cost. In addition, QuickLogic's eFPGA support for SMICs, which are known for their cost effectiveness, is a major highlight.

Menta

Menta is the only remaining eFPGA vendor in Europe. It is the only proven provider of programmable logic in Europe that can embed its IP into customer SoCs and ASICs. This programmable logic takes the form of embedded FPGA IP. It offers customers the possibility to take a small part of their SoC and have it implement a low-power FPGA that can be programmed by them or by the customer in the field.

NanoXplore

NanoXplore is a company based in France. The company is a pioneer in designing large-scale programmable logic arrays for state-of-the-art FPGA cores. NanoXplore offers advanced silicon proven eFPGA IP in leading foundries supporting proven technologies up to 28nm. NanoXplore has also developed a highly innovative diagnostic technology for electronic devices, called Silicon Rating.

ADICSYS

ADICSYS is a fabless semiconductor company that designs and licenses soft FPGA IP for ASICs and SOCs. These programmable cores can be easily and fully integrated into the user's RTL design flow. ADICSYS builds on more than a decade of experience in custom FPGA and eFPGA projects and leading semiconductor products. As with other IPs, the unique opportunity to include FPGA functionality in an ASIC brings the flexibility needed to modify functionality without redesigning the chip, or allowing the device to meet a wide range of application requirements. In both cases, better control over NRE and TTM is possible.

Efinix

Efinix is an innovator of programmable product platforms and technologies. The company's Quantum programmable technology enables advanced programmable chip products in the ASIC, ASSP, and FPGA space. With Quantum's Power-Performance-Area advantage, Efinix products address the needs of high-volume, low-power and small form factor products. efinix's joint development activities focused on infrastructure, data centers, and advanced silicon processes further extend the company's leadership position in the programmable industry.

These eFPGA startups have grown exponentially in an era when semiconductor startups were scarce. Companies such as Flex Logix and Menta have received a number of investments, and others such as Achronix and QuickLogic have invested heavily in eFPGAs based on internal growth expectations.

Ⅳ Frequently asked questions about eFPGAs

1. Can eFPGAs operate at the frequency required for my design?

Compared to ASICs, most FPGA designs do not operate at the same frequency. In fact, FPGAs do not win with high clock frequencies. The high performance of FPGAs is mainly achieved by extremely high hardware parallel processing capability, deep pipelining, and high bit-width buses.

Embedded FPGAs, or eFPGAs, are also programmable logic arrays by nature, so they are not comparable to ASICs in terms of operating frequency alone.

However, the industry and academia are constantly researching ways to break through the frequency limits of FPGAs. For example, Intel has adopted the HyperFlex architecture in its new generation of high-end FPGA products, Stratix10, which introduces multiple register arrays between programmable logic cells and can increase the operating speed of FPGAs by 1.5 to 2 times.

The programmable logic unit introduces multiple register arrays

Many application scenarios have a high tolerance for error, so a simple "overclocking" of the FPGA can greatly improve the performance of the FPGA at the cost of a very small probability of accuracy loss.

2. Will the power consumption of eFPGA be too large?

The answer to this question should be negative. Not only that, the power density of eFPGA is usually much lower than that of FPGAs, or other IP on ASICs and SoCs.

For traditional FPGAs, one of its main "power consumers" is the programmable I/O part of the FPGA. The eFPGA is directly connected to the other IP of the ASIC through the on-chip bus, which directly removes the I/O part of the original FPGA, thus cutting down most of the power consumption.

On the other hand, as mentioned in the previous question, the frequency of eFPGA is much lower than other IPs on ASIC or SoC, which makes the dynamic power consumption of eFPGA relatively low.

3. Can eFPGAs provide enough bandwidth for my design?

For traditional FPGA designs, system performance is many times directly limited by the number of I/O pins on the FPGA chip. Especially for many communication, networking, and high-performance computing applications, FPGA chips are required to provide a large number of high performance SerDes transceivers and general purpose I/O pins for data exchange and transfer to external systems, which are usually limited by the chip packaging technology.

In contrast, eFPGA has no pin count limitation because it is essentially an IP core integrated in an ASIC. Therefore, the communication bandwidth between eFPGA and ASIC or SoC can be increased by more than 10 times compared to FPGA. In fact, this is one of the main driving factors for the creation and use of eFPGAs.

eFPGA

Instead of chip-to-chip connections, eFPGAs communicate directly through the connections of different IPs on the chip, which greatly improves communication bandwidth and reduces communication latency.

4. Using eFPGA will lead to too much chip area?

ASIC or SoC engineers are usually shocked by the size of FPGA chips when they see FPGAs for the first time because usually, FPGA chips are just too big.

Generally speaking, half of the main chip area of FPGA is programmable logic unit, and the other half is programmable I/O and related circuits. Programmable I/O is one of the assets of FPGAs that allows them to communicate with almost any other chip or system, including microprocessors, ASICs, memories, and other FPGAs. This is why the chip area of the programmable I/O section is so large.

Compared to FPGAs, eFPGAs do not need to implement a programmable I/O section because the ASIC IP that communicates with the eFPGA is fixed at design time. When the programmable I/O part is removed, the chip area of eFPGA is greatly reduced for the same logic density of FPGA.

5. Will the cost of using eFPGA be high?

According to Steve Mensor, vice president of marketing at Achronix, one of the leading providers of eFPGAs, the cost of using eFPGAs "is not more expensive than other IP.”

The cost of use should be viewed from two perspectives. The first is the direct monetary cost to the user, i.e., the money paid for the chip or IP. The other is the diversity of features that the purchased IP can provide, that is, the cost of implementing a certain function is shared. For FPGAs or eFPGAs, their most powerful feature is the ability to implement different user logic and to modify the functional logic after the chip has been flowed, thus significantly reducing the development risk of SoCs and ASICs and increasing the flexibility of the design.