075582814553
Chiplet Brings Change to the Business Model of IP Design Companies

FREE-SKY (HK) ELECTRONICS CO.,LIMITED / 12-08 13:36

The IP chain adds a "shortcut" to the chip manufacturing path and brings many benefits to chip design companies, especially in the Chiplet industry.

The reuse of IP modules can simplify chip design, as the Chiplet model allows for selective iterations of different IP units on a chip, and some of the iterated dies can be used to make the next generation of products, significantly shortening the time-to-market cycle.

As the technology node continues to improve, more and more IP (functional modules of large chips) will be integrated into a single chip. Chiplet mode can flow separately, so it can reduce the risk of flow failure by integrating more widely used and mature IP modules, achieving a balance in terms of cost, efficiency, performance, power consumption, and commercial risk, which greatly reduces the difficulty of chip development.

The Chiplet model allows different functional IP modules, such as CPU, memory, and analog interfaces, to be flexibly produced in different processes, and each IP can perform optimally without being limited to the process.

In the face of all the benefits brought by the IP industry, and against the background of the rapid development of the Chiplet concept, there is also a huge market space for IP design companies.

According to a report by research firm Omdia, the global market for processor chips using Chiplet will reach US$5.8 billion in 2024 and US$57 billion by 2035. And the semiconductor IP market can also be expected to grow from US$4.7 billion in 2017 to US$6.5 billion in 2024.

In addition, the changes in the semiconductor chip industry spawned by Chiplet technology could also bring a number of changes to the business models of IP companies.

Chiplet Brings Changes to the Business Models of IP Design Companies

More new entrants

As the chip industry continues to evolve, the number of companies producing IP modules using Chiplet as the underlying technology will increase significantly. For example, EDA companies with their own chip design capabilities continue to build up their IP products and continue to supply Chiplet products, while some internet companies are also building their own video processing chips. Such chips can simply be divided into standard parts and IP die with the upper layer of image recognition and voice recognition applications strongly bound, and Chiplet technology can allow these two parts to achieve design coupling. Therefore involving IP products to meet the business needs of their own software has become a director of development for them.

IP suppliers with strong design capabilities evolve into Chiplet suppliers

IP is located upstream in the IC industry chain and the main customers are the design vendors, so Chiplet can provide a new form of product and increase the potential market. For some vendors with strong design capabilities, it is possible that they will evolve into Chiplet-specific suppliers in the future.

However, this will also require IP suppliers to have high-end chip design capabilities, as well as a multi-category IP layout and platform operation. Some companies have already started to prepare for this, such as VeriSilicon, the number one IP company in China, and Cambuji, a domestic AI chip unicorn, as well as local IP vendors that have been working in the niche for many years, including local RISC-V eco-leader CoreTech, CoreDynamics, which provides a full set of high-speed hybrid circuit IP cores from 0.18um to 5nm, CPU, DSP, GPU and AI processor IPs with fully independent intellectual property rights. DSP, GPU, and AI processor IPs, and Huada Jutian, which provides high-speed interface IPs, etc. These IP vendors are strengthening in their respective fields and are expected to usher in significant progress during the Chiplet development period, realizing IP silicon cation in the form of Chiplets.

Significant increase in product margins

Today's products are changing from soft core to hard core offerings, and the whole phase of changing from virtual to physical can also bring about a significant increase in the amount of value.

In terms of profit calculations, IP vendors typically offer both licensing and royalty models, with royalties taking the lion's share. Under the licensing model, the designer pays for the number of IP licenses, which is a one-off product licensing fee. Under the royalty model, designers are paid for the number of chips manufactured, which is a licensing fee linked to product sales. Royalty is the main profit point of most semiconductor IP design companies, such as the cost of 1 cent/unit, selling 2 cents, then the gross margin is close to 100%, while in the IP model, chip IP vendors sell the same function of Chiplet to the chip design company, such as 20 cents/unit, the gross margin is reduced to 30%, but the gross profit becomes 6 cents/unit, although the gross margin is reduced, the gross profit can be increased Quite a lot.

According to IBS data, the number of IPs that can be integrated into a single chip at the 28nm process node, for example, is 87. When the process node evolves to 7nm, the number of IPs that can be integrated reaches 178, and the number of digital IPs and mixed digital-analog IPs that can be integrated at 5nm is 126 and 92 respectively, making a total of 218.

As a result, IP companies transitioning to Chiplet products will be able to benefit from the increasing iterations of advanced processes and significantly increase their gross margins, which should not be underestimated in the overall market.

However, Chiplet is still in its infancy and only a few companies have the capability to develop these products. Most companies do not yet have sufficient expertise, including design capabilities, die, die-to-die interconnects and manufacturing strategies, and if there are problems with the definition of Chiplet, the large inventories of chip IP vendors are prone to stalling and the risk of inventory impairment.

Difficulties in IP Reuse

In recent years, as the chip industry has become a hot commodity in the capital market, many chip companies have chosen to purchase large quantities of IP to assemble a chip that satisfies investors quickly, but the hidden technical difficulties behind chip IP have not yet been solved.

Die-to-Die interface is a new challenge

As we enter 2022, several Chiplet products have been launched in the industrial sector, and domestic chip companies are also unanimously optimistic about Chiplet, but the development of Chiplet has also created the need for a high-speed Die to Die interface.

A suitable Die-to-Die interface is an important factor affecting chip performance. The architecture and interconnection protocols of different modules are different, and designers must take into account many complex factors such as process, packaging technology, system integration, and expansion. At the same time, they must also meet the requirements of different fields and scenarios in terms of information transmission speed and power consumption. Therefore, it is exceptionally difficult to achieve efficient data transmission with a unified IP interface in the Chiplet design process, and the biggest challenge in solving these problems is the lack of a unified interconnection standard protocol.

In March this year, AMD, Intel, Samsung, and other top ten industry leaders announced the establishment of the Chiplet Industry Alliance to jointly build the Chiplet interconnect standard UCLe (Universal Core Interconnect Technology) and promote open ecology, domestic companies such as VeriSilicon and CorePower Technology have also joined the UCIe industry alliance and have now launched substantial products. For example, VeriSilicon has designed a high-end application processor platform based on the Chiplet architecture; VeriSilicon has also released its own Innolink Chiplet solution, the first cross-process, cross-package physical layer compatible with the UCIe international standard, but it is still in the early stages of development.

Finding reusable IP

Finding reusable IP modules is also a challenge.

Currently, semiconductor companies mostly use IP modules used in previous projects or search through company IP catalogs. While this approach is effective, it does not provide the best performance for the project at hand, and sometimes it takes at least a day or more just to find the right IP, which then needs to be cataloged and certified. It is therefore particularly important to find a more standard, data-driven approach to IP reuse.

Finally, tracking and determining the quality of IPs is also a challenge.

The Competitive Landscape for Companies

In terms of the competitive landscape for semiconductor IP, ARM (UK) and Synopsys (US) will hold the number one and number two positions in the world with a high market share of 40.4% and 19.7% in 2021 (41% and 19.3% respectively in 2020), while only VeriSilicon (China) will be in the top ten with a global market share of 3.3%.

The IP market is divided into two main categories: one is the semiconductor IP suppliers bundled with EDA tools, such as Cadence, Synopsys, etc.; the other is the semiconductor IP suppliers providing IP modules for specialized fields, such as ARM, VeriSilicon, CorePower, CEVA, ImaginaTIon, etc. Arm, as the king of the mobile Arm as the king of the mobile era, layout CPU and GPU architecture and other core IP for many years, but also joint partners to establish an integrated IP-chip-application ecology, has formed a high ecological barrier.

As we all know, the IP industry is not only important for chip design technology, but also for ecological construction. Usually, platform-based application areas such as computers, mobile phones, and servers are greatly influenced by the software and hardware ecosystem. With the gradual development of domestic chip IP companies and the expansion of their IP product range, they are increasingly influenced by ARM's software and hardware ecosystem and have been looking for a good opportunity to finally choose the path to enter the B sector.

In the to B field, the compatibility of IP product lines, ease of use, and service cycles to convenience, product performance, and stability will all become factors that affect the winner. Chip upgrades increasingly rely on multi-core, IP core multiplexing, software upgrades, etc. to achieve; the IP licensing development model greatly shortens the chip development time, reduces development risks, improves chip reliability, and therefore has an advantage for latecomers.

With the development of artificial intelligence, 5G communication, IoT, and the emergence of new waves such as Chiplet, the stage for domestic companies is becoming bigger and bigger. In addition, the emergence of RISC-V provides a once-in-a-lifetime opportunity for the development of Chinese processor IP.


Processed in 0.098287 Second , 23 querys.