075582814553
The PI6CEQ20200LIEX is a high performance PCIe Gen2/ Gen3 zero delay buffer with two HCSL outputs. Diodes' proprietary equalization technique used in this device improves signal integrity and makes this device suitable for PCIe Gen2/ Gen3 applications even when the input from the main clock has to travel a long distance.
PCIe Gen2/ Gen3* compliant clock buffer/ZDB* Gen3 performance only available in Commercial temp
Internal equalization for better signal integrity
2 HCSL outputs
Dual PLL bandwidth for SSC tracking
Cycle-to-Cycle Jitter : 40ps (typ)
Output-to-Output Skew <10ps
3.3V supply voltage
TSSOP-20 packages
Servers
Embedded computing systems
Networking systems
PLL
Yes
Main Purpose
PCI Express (PCIe)
Input
HCSL
Output
HCSL
Number of Circuits
1
Ratio Input:Output
1:2
Differential Input:Output
Yes/Yes
Frequency Max
110MHz
Voltage Supply
3.135V ~ 3.465V
Operating Temperature
-40??C ~ 85??C
Mounting Type
Surface Mount
Package / Case
20-TSSOP (0.173, 4.40mm Width)
Supplier Device Package
20-TSSOP
Catalogue
FPGA / CPLD
Memory
MOS 
MCU 
DSP
OCEP
Secondary 
Other 