Microstrip usually provides easier surface connections and probing access, while stripline offers stronger field confinement between reference planes. Neither is universally better: the choice depends on impedance, complete-channel loss, propagation delay, and transitions in the actual PCB stackup. This guide compares their structures, electrical performance, and practical design trade-offs to help you choose the right approach for your signal path.

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Figure 1. Stripline vs Microstrip

What Are Stripline and Microstrip

What Is Stripline

A stripline is a transmission-line structure with a signal conductor embedded in dielectric between two reference planes. Ground planes are commonly used, although a suitably designed power plane can also provide an AC reference. The reference conductors are part of the transmission line, rather than simply copper placed nearby.

The signal conductor may be centered between the planes or offset toward one of them. Both arrangements are striplines; the distinction affects the model used to calculate their electrical properties.

What Is Microstrip

A microstrip consists of a surface signal trace separated from a reference plane by a dielectric substrate. A typical implementation uses a top-layer trace with a continuous ground plane on the layer below.

The region above an uncovered trace is air. In a finished PCB, solder mask may cover the conductor, changing the dielectric environment. This coating should be included in the model when its effect matters to the impedance tolerance. An outer-layer trace with ground conductors on the same layer, alongside the signal trace, and a ground plane beneath it forms a grounded coplanar waveguide (GCPW). The lateral grounds are typically connected to the underlying plane with ground vias.

The table below compares conventional surface microstrip with stripline:

Common Stripline and Microstrip Configurations

The following are some examples of stripline and microstrip routing techniques, as well as some of their basic characteristics:

Figure 2. Common Stripline and Microstrip Configurations

• Edge-Coupled Microstrip: Two traces run side by side on the same outer layer above a reference plane. This arrangement supports differential pairs, with trace spacing affecting coupling and differential impedance.

• Embedded Microstrip: The signal trace is buried in dielectric above a reference plane, without a second reference plane above it in the configuration shown. The dielectric covering the trace must be included in its impedance model.

• Symmetric Stripline: The signal trace is centered between two reference planes, with equal dielectric gaps above and below. The conventional model assumes matching dielectric properties on both sides.

• Asymmetric Stripline: The signal trace lies between two reference planes but is closer to one than the other. Both plane distances must be considered when calculating impedance.

• Edge-Coupled Stripline: Two traces run side by side on the same internal layer between reference planes. This arrangement supports differential pairs and may be centered or offset between the planes.

• Broadside-Coupled Stripline: Two traces on different internal layers overlap between reference planes, with dielectric separating them and no plane between them. Vertical spacing and overlap affect coupling, making layer alignment an important manufacturing consideration.

These configurations define the geometry used for analysis. The next section explains how the surrounding dielectric and reference planes shape the electromagnetic fields.

Field Distribution and Dielectric Environment

Electromagnetic Fields and Reference Planes

Signal energy travels through the electromagnetic fields associated with the conductors. In stripline, the two reference planes confine much of that field to the dielectric region between them. Microstrip has a more open field distribution, extending through the substrate and into the space above and beside the trace.

This difference explains why nearby metal, coatings, and adjacent conductors can influence a surface trace. It also explains the stripline's useful isolation from circuitry outside its reference planes. Neither structure makes the rest of the PCB irrelevant: plane openings and connections still form part of the signal environment.

Figure 3. Electric-field Distribution in Microstrip and Stripline

Relative Permittivity and Effective Permittivity

Relative permittivity, written as ε_r and often called Dk, describes a dielectric material. Effective relative permittivity, ε_eff, describes the equivalent dielectric environment experienced by a particular transmission-line mode.

For a conventional uncovered microstrip, some field is in air and some in the substrate, so ε_eff lies between the relative permittivity of air and that of the substrate. Its value depends on geometry and frequency. For an ideal stripline filled with one uniform dielectric, ε_eff equals ε_r. A real stackup containing different materials above and below the trace needs a model of those layers.

TEM and Quasi-TEM Propagation

An ideal stripline in a homogeneous dielectric supports a transverse electromagnetic, or TEM, mode: the electric and magnetic fields are perpendicular to the direction of propagation. Conventional microstrip is inhomogeneous because its fields occupy materials with different permittivities. Its dominant mode is described as quasi-TEM when the longitudinal field components are small.

These descriptions assume operation in the intended mode. They do not mean a practical PCB remains free of higher-order modes or other effects at arbitrarily high frequencies.

Stripline vs Microstrip: Electrical Performance

Characteristic Impedance and Calculation

Characteristic impedance, Z₀, is the voltage-to-current ratio of a traveling wave on a uniform line. It is not the trace’s DC resistance. For a low-loss transmission line, characteristic impedance is approximately the square root of the ratio of inductance per unit length to capacitance per unit length.

Increasing trace width generally lowers impedance when other parameters remain fixed. Moving a reference plane closer also generally lowers impedance. Copper thickness and dielectric properties matter, so transferring a width from one layer to another does not preserve impedance automatically.

For preliminary estimates, Analog Devices MT-094 presents these approximate equations.

For an uncovered microstrip:

$$Z_0\approx \frac{87}{\sqrt{{\epsilon }_r+1.41}}\ln \left(\frac{5.98h}{0.8w+t}\right)$$

For a symmetric stripline:

$$Z_0\approx \frac{60}{\sqrt{{\epsilon }_r}}\ln \left(\frac{1.9b}{0.8w+t}\right)$$

Where:

- Z₀ is characteristic impedance in ohms.

- w is trace width.

- t is copper thickness.

- h is the dielectric gap between the microstrip conductor and its reference plane.

- b is the separation between the stripline reference planes.

- ε_r is the dielectric’s relative permittivity.

Use the same unit for every length. The logarithm is natural.

These equations are approximate models for the stated cross-sections. MT-094 states that the IPC microstrip approximation is most accurate between 50 and 100 Ω. This statement should not be applied to the stripline equation. Accuracy still depends on geometry, and neither equation directly covers coupled pairs, asymmetric striplines, or arbitrary dielectric coatings. Use a suitable field solver and the fabricator’s stackup for final dimensions.

For a balanced, symmetric differential pair:

Z_diff=2Z_odd

Z_odd  is the impedance seen by one conductor when the pair is driven with equal and opposite signals. It includes coupling to the other conductor. Consequently, differential impedance is not generally twice the impedance of an isolated trace. Pair spacing must be included in the calculation.

Figure 4. Key Dimensions for Microstrip and Stripline Impedance Calculations

Propagation Delay

For a low-loss line treated as approximately nondispersive over the relevant band:

$$v_p\approx \frac{c}{\sqrt{{\epsilon }_{\mathrm{eff}}}}$$

$$t_d\approx \frac{\ell \sqrt{{\epsilon }_{\mathrm{eff}}}}{c}$$

Here, c is the speed of light in vacuum, ℓ is the route length, and t_d is its one-way propagation delay. Conventional microstrip typically has a shorter delay per unit length than stripline using the same substrate material, because its effective permittivity is lower.

For a 100 mm route, assuming ε_eff = 3.0 gives approximately 0.578 ns of delay. A homogeneous stripline with ε_r = 4.0 gives approximately 0.667 ns. These are illustrative assumptions, not measured laminate properties, and the estimates exclude additional delay from vias and other transitions.

This matters when matching clocks or related signals across layers. Equal copper lengths can produce unequal delays if the structures or materials differ. Include transitions and use a frequency-dependent channel model when a single velocity estimate is insufficient. Faster propagation alone does not establish a higher supported data rate.

Conductor, Dielectric, and Radiation Losses

Conductor loss comes from finite conductivity in the trace and reference conductors. Skin effect and current crowding change the current distribution with frequency; copper roughness can add further loss. Trace dimensions and the copper surfaces carrying the current therefore matter.

Dielectric loss is associated with the substrate’s dissipation factor, also called loss tangent. Stripline places its fields within the dielectric, while microstrip places some of its field in air. That can give microstrip a dielectric-loss advantage under comparable material conditions, but it does not establish the total channel loss.

Radiation is another contribution. Microstrip’s open structure can radiate, especially at discontinuities and when substrate dimensions become electrically significant. Rogers notes that substrate thickness and Dk affect this behavior at millimeter-wave frequencies. Stripline provides better field confinement, but a lossy laminate or a narrow conductor can still produce substantial attenuation. Compare both complete routes at the same frequencies, including their transitions.

Dispersion

Dispersion means that phase velocity changes with frequency. Different frequency components of a pulse then accumulate different phase delays, which can alter the waveform.

Microstrip has geometric dispersion because its field distribution changes with frequency. An ideal TEM stripline in a homogeneous, nondispersive dielectric does not have that same mechanism. Real stripline still experiences frequency-dependent material properties and conductor effects, so describing every stripline as completely dispersion-free is too broad. Broadband simulation should include the relevant material dispersion as well as attenuation.

Crosstalk

Crosstalk is unwanted coupling from one signal path into another. It depends on conductor spacing, distance to the reference planes, parallel routing length, signal spectrum, and termination.

Stripline’s reference planes help isolate it from circuitry beyond those planes. They do not prevent neighboring traces between the same planes from coupling. Two internal signal layers without an intervening plane can also couple strongly when their traces overlap. Microstrip coupling likewise grows as traces move closer or run beside each other for longer distances.

For a fair comparison, evaluate near-end and far-end crosstalk in the proposed stackup. A universal spacing rule expressed only as a multiple of trace width cannot guarantee a particular isolation level.

EMI and Shielding

Electromagnetic interference, or EMI, concerns unwanted electromagnetic disturbances. Relevant design issues include radiated emissions and susceptibility to external fields. Stripline’s enclosing reference planes usually make field containment easier than with an exposed microstrip route.

However, shielding along the uniform trace does not eliminate emissions from connectors, plane edges, or poorly controlled return paths. Plane discontinuities can force currents into larger loops, while imbalance in a differential path can generate common-mode energy. Assess the full board and its external connections rather than treating an internal layer as an automatic EMC solution.

Practical PCB Design Considerations

Stackup, Routing Density, and Layer Count

Choose the stackup before assigning critical trace widths. Microstrip needs a suitable outer signal layer and reference plane; stripline needs internal routing space between references. Internal layers can relieve surface congestion, but each plane and signal layer consumes part of the board’s thickness and fabrication budget.

Routing density is not an intrinsic ranking between the two structures. Compare actual trace widths, required clearances, via escape space, and component placement. A nominally compact route may need wider spacing to meet its crosstalk requirement. Request manufacturable stackup options early rather than designing around an assumed dielectric thickness.

Reference-Plane Continuity, Vias, and Layer Transitions

Preserve the reference plane beneath or around the route. Crossing a split or gap can interrupt the local return path and introduce an impedance discontinuity.

At a layer change between ground-referenced routes, nearby ground stitching vias provide a connection between the reference planes. If the reference changes between different nets, the return-path design needs separate analysis. A ground stitching via must not directly connect a power plane to ground, as this would create a short circuit. Transitions between different reference nets require a suitable AC return path whose impedance is evaluated over the relevant signal bandwidth.

Signal vias also add electrical discontinuities. Their pads, antipads, barrel length, and unused stubs affect the channel. Backdrilling or suitable blind and buried vias may be useful when stub resonances threaten the required bandwidth. Use them where analysis justifies the added process cost.

Figure 5. Signal and Return-current Paths at a Ground-referenced Layer Transition

Probing, Debugging, and Rework

Surface microstrip is easier to reach for probing or a local modification. Buried stripline normally requires planned access through pads, connectors, or test structures.

Accessibility does not make a measurement harmless. A probe, test pad, or added branch changes the circuit being measured. Place necessary access points during layout and include their loading in the channel assessment. A dedicated test coupon can help characterize the impedance and loss of a representative interconnect. Debugging signals on the operating board requires planned measurement access, using suitable probes or connector launches while accounting for their loading and parasitic effects.

Manufacturing Tolerances and Cost

Finished trace width, etched sidewall shape, copper thickness, and pressed dielectric thickness can all shift impedance. Surface coatings must match the modeled microstrip structure. For broadside-coupled pairs, layer registration is especially important because lateral misalignment changes coupling. Polar Instruments specifically identifies registration and etching variation as challenges for consistent broadside-coupled impedance.

Cost should be compared at board level. If a multilayer stackup already provides the required planes, moving a route to stripline may not add a layer. If it requires more layers, tighter tolerances, or additional via processing, the cost can change considerably. Obtain a quotation for the actual construction rather than assigning a fixed price premium to stripline.

Simulation and Measurement Verification

Use a cross-sectional field solver to establish trace dimensions and coupled-pair impedance. Include actual dielectric layers and relevant conductor and coating details. Analyze vias, connector launches, and other three-dimensional discontinuities with an appropriate model.

Time-domain reflectometry, or TDR, helps identify impedance changes along a test path. Frequency-domain S-parameters describe transmission and reflection across the operating band; differential channels may also need mode-conversion analysis. Account for fixtures and launches through calibration or de-embedding where necessary. Passing an impedance coupon test does not, by itself, prove that the complete assembled channel meets its loss or timing budget.

How to Choose Between Stripline and Microstrip

Define the Signal and Channel Requirements

Start with the interface’s target impedance, loss budget, timing tolerance, and noise limits. For RF signals, identify the operating band and phase requirements; for digital signals, consider rise and fall times as well as data rate. Use these priorities to assess the options below.

Selection Table by Design Requirement

Application Examples and Trade-offs

• Short RF connections: Microstrip provides direct access between surface components, such as an RF IC and its matching network. Check whether the device’s recommended layout uses microstrip or grounded coplanar waveguide.

• Internal high-speed links: Stripline offers isolation and internal routing space, but a short surface route may perform better than a longer internal route with additional transitions.

• Mixed-signal boards: Stripline’s reference planes can help isolate sensitive routes from external circuitry. Component placement and separation from noise sources remain important.

Using Both Structures on the Same PCB

A channel can use microstrip near components and stripline for internal routing. Design each section for the required impedance and maintain a continuous return path through layer changes. Include transition loss and delay in the channel assessment, and preserve pair symmetry for differential signals.

Conclusion

Microstrip offers straightforward surface connections and test access. Stripline provides internal routing with stronger field confinement. Choose between them by evaluating the actual stackup, signal requirements, and complete channel. Correct impedance, continuous return paths, and verified transitions matter in either implementation.