The CD4052BC is a reliable analog multiplexer designed to simplify signal routing using digital control. It allows you to switch between multiple signals efficiently while maintaining stable performance and low power consumption. This article will discuss the CD4052BC overview, pinout details, specifications, features, working in circuit, equivalents, applications, comparison with CD4052, and ordering variants.

The CD4052BC is a dual 4-channel analog multiplexer/demultiplexer designed to switch and route signals using digital control. It is part of the CMOS family and offers low ON resistance with very low OFF leakage, helping maintain signal integrity during operation. The device supports a wide voltage range, allowing it to handle both positive and negative signal levels with stable performance.
It is an improved CMOS version of CD4052 with better noise immunity and stability. This IC uses two binary control inputs (A and B) along with an inhibit input to manage channel selection. By changing the logic levels of A and B, one of four channels is connected to the output, while the inhibit pin can disable all channels when needed. Its internal design ensures smooth switching and low power consumption, making it reliable for controlled signal routing in electronic systems.
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| Pin No. | Pin Name | Description |
| 1 | 0Y | Channel 0 input/output (Y section) |
| 2 | 2Y | Channel 2 input/output (Y section) |
| 3 | Z (OUT/IN) | Common output/input for Y channels |
| 4 | 3Y | Channel 3 input/output (Y section) |
| 5 | 1Y | Channel 1 input/output (Y section) |
| 6 | INH | Inhibit (Disable) input – HIGH disables all channels |
| 7 | VEE | Negative supply voltage (for analog signals) |
| 8 | VSS | Ground (0V) |
| 9 | B | Select input B (channel control) |
| 10 | A | Select input A (channel control) |
| 11 | 3X | Channel 3 input/output (X section) |
| 12 | 0X | Channel 0 input/output (X section) |
| 13 | Z (OUT/IN) | Common output/input for X channels |
| 14 | 1X | Channel 1 input/output (X section) |
| 15 | 2X | Channel 2 input/output (X section) |
| 16 | VDD | Positive supply voltage |
• CD4052
• CD4052BE
• CD4052BM
• NTE4052
• HEF4052B
• MC14052B
• HCF4052BE
• TC4052BP
• 74HC4052
• 74HCT4052

| Parameter | Specification |
| Device Type | Dual 4-Channel Analog Multiplexer/Demultiplexer |
| Technology | CMOS (Buffered) |
| Number of Channels | 2 × 4 Channels |
| Supply Voltage (VDD) | 3V to 18V |
| Negative Supply (VEE) | 0V to -13V |
| Input Voltage Range | VEE to VDD |
| ON Resistance (RON) | typically 80Ω–125Ω depending on supply voltage |
| OFF Leakage Current | Very low (≈ ±0.1 µA typical) |
| Control Inputs | 2 (A, B) + 1 Inhibit (INH) |
| Logic Voltage Levels | Compatible with CMOS logic |
| Operating Temperature | -55°C to +125°C |
| Power Consumption | Low (quiescent current in µA range) |
| Package Types | DIP, SOIC |
| Switching Time | ~100 ns (typical) |
| Crosstalk | Low |
| Signal Type | Analog and Digital |
The CD4052BC supports a wide range of both digital and analog signal levels, allowing it to handle digital inputs from 3V to 15V and analog signals up to 15V peak-to-peak. This makes it flexible for circuits that require switching between different signal types while maintaining stable performance across varying voltage levels.
The device features low ON resistance, typically around 80Ω at VDD − VEE = 15V. This ensures minimal signal loss when a channel is active, helping maintain signal integrity and improving overall efficiency during switching operations.
When channels are turned off, the CD4052BC provides high OFF resistance with very low leakage currents (around ±10 pA typical). This helps prevent unwanted signal flow between channels and ensures better isolation.
The IC supports logic-level conversion, allowing digital control signals (3V to 15V) to switch analog signals effectively. This makes it easy to interface with standard CMOS logic without additional level-shifting components.
The switch channels are designed with matched ON resistance (around 5Ω variation typical), ensuring consistent performance across all channels. This helps maintain balanced signal routing and reduces distortion.
The CD4052BC consumes very low quiescent power, typically around 1 µW under standard conditions. This makes it efficient for circuits where power saving is important while still maintaining reliable switching performance.
It contains two independent 4-channel multiplexers within a single IC. This allows simultaneous control of two separate signal paths, increasing design flexibility and reducing the need for additional components.
The inhibit (INH) pin allows all channels to be disabled at once. This feature is useful for quickly isolating signals and preventing unintended connections during switching.
The IC operates over a broad supply voltage range from 3V to 18V, with support for dual supply configurations using VEE. This enables it to work in both single-supply and dual-supply systems.
The CD4052BC is designed to minimize crosstalk between channels, ensuring clean signal transmission. This improves reliability in circuits where signal separation is critical.
How the CD4052BC is used to control signal routing using digital logic and a transistor stage? The IC (U6) is powered with a dual supply, where VDD is connected to +18V, VSS is grounded, and VEE is tied to ground, allowing it to handle analog signals within that range. The X and Y sections of the multiplexer are available, but the control focus is on how the selection lines (A and B) are driven.

On the left side, the control signal comes from an ESP32 (labeled “digitout-esp32”). This signal passes through a resistor (R20) into the base of the 2N3904 transistor (Q9). The transistor acts as a switch, helping translate the microcontroller’s output into a stable control signal. The resistors around Q9 (R1206 and R24) ensure proper biasing and prevent unwanted floating states.
The output of this stage drives the gate of the IRF5305 MOSFET (Q8). This MOSFET acts as a high-side switch, controlling the voltage level applied to the CD4052BC control pins (A and B). When the MOSFET turns ON, it pulls the control line to a defined level, allowing the multiplexer to select a specific channel. When it turns OFF, the control line changes state, switching to another channel.
Inside the CD4052BC, the selected channel is determined by the logic levels at pins A and B. Based on these inputs, one of the X or Y channels (X0–X3 or Y0–Y3) is connected to the common output. The inhibit pin (INH) can disable all channels if needed, but in this circuit, it appears unused or fixed.

The CD4052BC can be configured to operate as a 4:1 multiplexer, but it is important to understand that it contains two independent sections. Each section has four input channels, labeled X0–X3 and Y0–Y3, with separate outputs X and Y. Instead of combining signals into a single output, the device selects one input from each section at the same time based on the control inputs.
The channel selection is controlled by two binary inputs, A and B. These inputs determine which channel is connected to the outputs. When the logic levels on A and B change, the corresponding input channels from both X and Y groups are connected to their respective outputs. For example, if A is HIGH and B is LOW, the second channel (Channel 1) is selected, connecting X1 to X and Y1 to Y simultaneously.
The inhibit (INH) pin provides an additional level of control. When this pin is set HIGH, all channels are turned OFF, disconnecting both outputs regardless of the select inputs. This ensures that no signal passes through when isolation is required.

The CD4052BC can also operate as a 1:4 demultiplexer, where a single input signal is directed to one of multiple output channels. However, it is important to note that the device contains two independent sections, so both X and Y paths are controlled at the same time. The common pins X and Y act as the inputs, and the selected signals are routed to one of the corresponding output channels (X0–X3 and Y0–Y3).
Channel selection is controlled by the binary inputs A and B. These control lines determine which output pair is active. When a specific combination of A and B is applied, the input signals at X and Y are simultaneously connected to the matching output channels. For example, when A is LOW and B is HIGH, the third channel is selected, routing the input signals to X2 and Y2.
The inhibit (INH) pin adds control by disabling all connections when set HIGH. This ensures that no output channel is active, even if the select inputs are set.
| INH | B | A | X Channel Selected | Y Channel Selected |
| 0 | 0 | 0 | X0 | Y0 |
| 0 | 0 | 1 | X1 | Y1 |
| 0 | 1 | 0 | X2 | Y2 |
| 0 | 1 | 1 | X3 | Y3 |
| 1 | X | X | None | None |
• Signal routing
• Data acquisition systems
• Analog signal switching
• Audio signal switching
• Channel selection circuits
• Multiplexing and demultiplexing
• Test and measurement equipment
• Communication systems
• Sensor signal selection
• Digital control of analog signals
• Signal path selection
• Switching networks
| Feature | CD4052BC | CD4052 |
| Version Type | Improved / Buffered version | Basic / Standard version |
| Technology | Buffered CMOS | Standard CMOS |
| Noise Immunity | Better | Normal |
| Signal Stability | More stable | Standard |
| ON Resistance | Lower and more consistent | Slightly higher |
| Leakage Current | Lower | Higher compared to BC |
| Switching Performance | Improved | Standard |
| Power Consumption | Low | Low |
| Reliability | Higher | Good |
| Logic Compatibility | Enhanced | Standard |
| Pin Configuration | Same | Same |
| Function | Dual 4-channel MUX/DEMUX | Dual 4-channel MUX/DEMUX |
| Replacement | Can replace CD4052 | Can be replaced by CD4052BC |
| Ordering Code | Package Type | Mounting Type | Pin Count | Operating Temperature | Packing Type |
| CD4052BCN | DIP (PDIP) | Through Hole | 16 | -40°C to +85°C | Tube |
| CD4052BCM | SOIC | Surface Mount | 16 | -40°C to +85°C | Tube / Reel |
| CD4052BCMX | SOIC | Surface Mount | 16 | -40°C to +85°C | Tape & Reel |
| CD4052BCNTR | DIP (PDIP) | Through Hole | 16 | -40°C to +85°C | Tape & Reel |
| CD4052BCDR | SOIC | Surface Mount | 16 | -40°C to +85°C | Tape & Reel |

The CD4052BC’s improved design over the standard CD4052 ensures better noise performance, consistent switching behavior, and reliable operation across different voltage levels. With its dual multiplexer structure, simple control interface, and low power consumption, it provides a practical way to manage multiple signal paths within a single device. By understanding its pin configuration, features, and working principle, you can confidently integrate the CD4052BC into your circuit design. If you are looking for a dependable multiplexer with improved performance and flexibility, the CD4052BC is a solid option to consider.