075582814553
Pull up is to clamp an uncertain signal to a high level with a resistor, and the resistor also acts as a current limiter. In the same way, pull down means to clamp the uncertain signal to a low level through a resistor. To pull up is to input current to the device, and the pull-down is to output the current.
Usually, a non-collector (or drain) open output circuit (such as the ordinary gate circuit) could only supply limited current and voltage, but the pull-up resistor can create an output current channel for the circuit.
To lead the resistance out from the high level of the power supply and connect it to the output terminal.
① If the output level is OC (Open Collector, TTL) or OD (Open Drain, CMOS), it will not work without a pull-up resistor. No resistor can output a high level without a power supply.
② If there is already a pull-up resistor in the circuit, but the resistance is too large and the voltage drop is too high, the output level will decrease when the output current is overlarge. In this case, a pull-up resistor can be applied to provide the current for the resistor and "pull up" the level. Connect a resistor in parallel with the pull-up resistor inside the IC, and the total current increases with the decrease of the total resistance. This method can also be used to match the level of the gate circuit. It should also be noted that the pull-up resistance of the resistor working in the linear range could not be too small.
Generally, when the IC is used for single-key triggering, if there is no internal resistance, to maintain the key untriggered or return to the original state after triggered, another resistor must be connected outside the IC.
The digital circuit has three states: high level, low level, and high resistance state. In some applications, the high resistance state is undesirable, which can be stabilized by pulling up or pulling down based on the design requirements.
Some I/O ports can be set while some can not, and some ports are built-in, and some are externally connected. The output of the I/O port is similar to a transistor, when it's connected to a resistor and a power supply, the resistor becomes a pull-up resistor. Similarly, the port is at a high level at the normal condition, but when it is linked to the ground through a resistor, the resistor turns into a pull-down resistor.
The pull-up resistor is used to supply the current when the bus drive capability is insufficient. In general, the pull-up increases the current, and the pull-down resistor is used to absorb the current.
① Functions
● When the TTL circuit drives the CMOS circuit, if the output high level of the circuit is lower than the lowest high level of the CMOS circuit (generally 3.5V), then it is necessary to connect a pull-up resistor to the output end of the TTL to increase the output high level.
● The gate circuit must use a pull-up resistor to increase the output high level.
● To enhance the drive capability of the output pins, some microcontrollers often use pull-up resistors.
● On the CMOS chip, in order to prevent damage caused by static electricity, unused pins should not be floating. Instead, a pull-up resistor is connected to reduce the input impedance and provide a path for loading shielding.
● Add a pull resistor to the pins of the chip to increase the output level, thereby improving the noise tolerance of the input signal and enhancing the anti-interference ability.
● Improve the anti-electromagnetic interference ability of the mainline. It's easily influenced by external electromagnetic interference if the pins are floating.
●The mismatched resistance in the long-line transmission is easy to cause reflected wave interference. The use of pull resistors can match the resistance and effectively suppress the interference.
② Defects
The pull-up resistor often consumes extra energy when current flows through it, which may cause a delay in the output level. Besides, some logic chips are sensitive to the transient state of the power supply introduced through a pull-up resistor, therefore, an independent voltage source with filtration is required.
It should be noted that if a pull-up resistance is too large, a delay will occur in the output level(RC delay).
Generally, the output pins of the CMOS gate circuit cannot be floating, but be connected to pull-up resistors and set to a high level.
The selection principles of pull-up resistance are:
① Considering the power saving and the current-sinking capability of the chip, the resistance should be large enough. If the resistance is large and the current will be small.
② The pull-up resistance should be small to ensure sufficient drive current. The current is large when the resistance is small.
③ For high-speed circuits, the edge of an overlarge pull-up resistance may be flattened.
① The Calculation Principle of the Maximum Value
Make sure that the pull-up resistance is significantly smaller than the impedance of the load so that the output is valid at high levels.
For example, if the load impedance is 1K, the supply voltage is 5 volts, if the high level is required to be no less than 4.5 volts, then the maximum pull-up resistance R ≧ 1K, which means the maximum value is 1k. If it exceeds 1k, the output high level will be less than 4.5 volts.
② The Calculation Principle of the Minimum Value
Ensure that the rated current of the transistor is not exceeded. If the transistor is not a field-effect tube but an ordinary triode, the minimum value can also be calculated according to the saturated current.
For instance, if Rmin= 5v/47mA = 106 ohms, if the resistance is less than this resistance, the transistor will be oversaturated. If it is greater than this value, the conductor resistance of the tube will become larger, which is not conducive to low-level output.
A pull-up resistor can be placed between the logic gate and its input end. For example, an input signal can be pulled up by a resistor, and a switch or jumper wire can connect the input to the ground. Besides, it can be used for information allocation and selection, or error detection and correction for external device signals.
Jumper Wires
The pull-up resistor can also work when there is no current supplied by the logic device. The open-collector has pull-up resistors, and the output signal of such circuits is often used in driving external devices, combining logic circuits and multiple devices connected to one bus.
Moreover, The pull-up resistor can be soldered on the same circuit board as other logic devices. In many microcontrollers, external programmable pull-up resistors are expected to be applied to the embedded controlling application to reduce the need for external components.
The pull-down resistor is directly connected to the ground, and when it’s connected to the diode, the end is linked to the low level. It's called a pull-down resistor because the level of the circuit node is pulled down to the ground.
① Connect an uncertain signal to the ground through a resistor and fix it at a low level.
② The pull-down is to output current from the device
③ When an IO port connected with a pull-down resistor is set to the input state, its normal state is at a low level.
A pull-down resistor is applied to the transistor base for these reasons:
① Prevention of the Noise Interference
Using pull-down resistors can prevent the transistor from malfunction due to the influence of noise signals, thus making the transistor cut-off more reliable.
The base of the transistor cannot be suspended. When the input signal is uncertain (such as in a high-impedance state), adding a pull-down resistor can effectively connect the circuit to the ground.
Especially when the GPIO(General Purpose Input/Output) is linked to this base, if the IC with the GPIO has just been powered on and initialized, the internal of the GPIO is also in the on the state, which is very unstable and prone to generate noise, causing malfunction. In this case, adding a pull-down resistor can eliminate this effect. If there is a sharp pulse level when its time of duration is very short, the voltage can be easily pulled down by the resistor, otherwise, it can not be pulled down.
General Purpose Input/Output (GPIO) Devices
The resistance should not be too small, or a large current will flow from the resistor to the ground, affecting the leakage current.
② To Avoid Time Lag
When the transistor switch is turned on, shorter ON and OFF times are preferred. In order to prevent the time lag caused by the residual charge in the transistor in the off state, a pull-down resistor is added between the base and the emitter for discharging. Special attention should be paid if there are high frequencies and deep saturation.
③ Facilitate the Setting of Bias Voltage
Adding a pull-down resistor to the base is mainly to set a bias voltage so that there will be no signal distortion. Especially when there is AC in the input signal, if the temperature rises, Ic will increase, resulting in the increase of Ie and the voltage drop on Re. Since Vbe = Vb-IeRe, and Vb is basically kept by the pull-down resistor, so Vbe is reduced. The decrease of Vbe makes Ib decrease, leading to an increase of Ic, which makes Ic basically constant. This is also the principle of feedback control.
Feedback Control System
At the same time, in order to prevent the input current from being too large, adding a resistor can divide a part of the current, so that the large current will not flow directly into the transistor and damage it.
The MOS transistor also needs a pull-down resistor to set GATE bias. Since the three pins inside the MOS transistor are insulated from each other, there will be a capacitance effect. When the signal disappears, the internal equivalent capacitance can be discharged through the pull-down resistor, otherwise logic errors will occur.
When we select the pull-up and pull-down resistors, the characteristics of the switch tube and the input characteristics of the lower-level circuit should be considered, which could be illustrated in these aspects:
● Driving capability and Power Consumption
Taking the pull-up resistor as an example, generally speaking, if the pull-up resistance is smaller, the driving ability would be stronger, and the power consumption will be greater. This should be
● Driving Demand of the Lower-level Circuit
Similarly, the pull-up resistor is used as an example. When the high level is output and the switch is turned off, the pull-up resistor should be able to provide sufficient current to the lower circuit.
● High and Low Level
The threshold level of the high and low levels in different circuits is different, and the resistor should be set appropriately to ensure that the correct level can be output. Taking the pull-up resistor for an example, when a low level is an output and the switch is on, the pull-up resistor and the on-resistance of the switching tube should be below the zero levels.
● Frequency characteristics
For the pull-up resistors, the capacitance between the pull-up resistor and the drain-source electrode of the switch tube and the input capacitance between the lower-level circuits will easily cause an RC delay. Larger resistance will lead to more delays.
In Circuit diagram-1, suppose that the transistor T1 is in a saturated state when there is a voltage input.
Circuit Diagram-1
A pulse voltage of 0-5V is input to the base of T1. When the input voltage is 5V, set T1 Ube = 0.7V, so the base current of T1:
Put the base current of T2 aside, because T1 is saturated, then Uce = 0.3V, so:
Circuit Diagram-2
Now let's see Circuit Diagram-2 Because T2 has an input resistance, we combine it with the base resistance to become 5K, which is the Rsr in the figure. First, make the input voltage of T1 be 0V, the T1 will be cut off and its collector should output a high level. But the real collector voltage is
which is neither high nor low. If the input voltage is slightly higher than 0V, T1 may enter the amplifier region, which will greatly increase the power consumption of the transistor and the collector voltage will be unstable.
When the T1 tube is saturated, logically, its collector voltage is 0.3V, which is a low level. The node-current relationship of the collector is:
That is:
This can be satisfied whether with a T1 transistor or any other components in the circuit. Therefore, when a backward-level system is added, it will affect the cut-off voltage of the preceding level, so that the collector voltage of the transistor drops from a high level to a state that is neither high nor low.
Circuit Diagram-3
On this occasion, a pull-up resistor can be connected to the input of the rear circuit, as the Rs in Circuit Diagram-3. One end of this resistor is connected to the power supply Vcc, and the other end is connected to the input terminal.
Assume that Rs = 5K, the parallel value of resistors of 10K and 5K is:
,
so the cut-off voltage of the T1 collector is:
,
which is much higher than the last value calculate.
Hence, the pull-up resistor is used to increase the high-level input voltage of the input stage.
It should be noted that is that when the T1 tube is saturated, the current generated by the pull-up resistor will flow into the collector. Therefore, the pull-up resistor is a current-sinking load for T1. The heating power consumption of the previous stage should be taken into account when we're choosing the specific resistance of the pull-up resistor.
And by analyzing with the same method, we can see that the pull-down resistor is a soucing current load for the previous stage and has an effect on the off-state of the transistor in the previous stage.
A pull-up resistor circuit is shown in the figure, which is an inverter in a digital circuit. When no low level is injected into the input terminal Ui of the inverter, the pull-up resistor R1 can make the input terminal stable at a high level, preventing the low-level interference that will cause the inverter to malfunction.
If there is no pull-up resistor, the input terminal of the inverter is suspended, so the external low-level interference will easily enter the inverter, thereby causing the inverter to flip in the direction of the output high level.
The figure shows the inverter in the digital circuit. The input terminal Ui is grounded through the pull-down resistor R1 so that when there is no high-level input, the input terminal can be stable at a low level without the high-level interference that causes the inverter to malfunction.
If the pull-down resistor R1 is omitted, the input end of the inverter is floating and at high impedance. As a result, the external high-level interference is easily added to the inverter from the input, making the inverter turn over in the direction of the output low level.
Catalogue
FPGA / CPLD
Memory
MOS 
MCU 
DSP
OCEP
Secondary 
Other 