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Hello everyone, I am Rose. Today I will introduce ARM processor to you. ARM processor is the first RISC microprocessor designed by Acorn Limited in the UK with low power cost. Full name Advanced RISC Machine. ARM processors are themselves 32-bit in design, but also come with a 16-bit instruction set, which typically saves up to 35% over equivalent 32-bit code, while retaining all the benefits of 32-bit systems.
The ARM architecture is a 32-bit reduced instruction set (RISC) processor architecture that was previously known as the Advanced RISC Machine and the Acorn RISC Machine. The ARM processor is frequently utilized in embedded system design because of its low power consumption and energy efficiency, making it ideal for mobile communication. Portable gadgets (PDAs, mobile phones, multimedia players, handheld electronic games, and computers), computer peripherals (hard drives, desktop routers), and even military equipment (missile onboard computers) are examples of consumer electronics.
ARM processor has the highest market coverage and broad development trend. The market share of 32-bit microprocessors based on ARM technology has reached 80% at present. Most IC manufacturers have launched their own ARM chips.
Industrial control field: As 32 RISC architecture, ARM core-based microcontroller chips not only occupy the majority of the high-end microcontroller market share, but also gradually expand to the low-end microcontroller application field. The low power consumption and high cost performance of ARM microcontroller challenge the traditional 8-bit / 16-bit microcontroller,
Wireless communication: At present, more than 85% of wireless communication devices have adopted ARM technology, and ARM is increasingly consolidating its position in this field due to its high performance and low cost.
Network equipment: With the promotion of broadband technology, ADSL chips using ARM technology are gradually gaining competitive advantages. In addition, ARM has been optimized in voice and video processing and has been widely supported, which also poses a challenge to the application field of DSP.
Consumer electronics: ARM technology is widely used in popular digital audio players, digital set-top boxes and game consoles.
Imaging and security products: The vast majority of popular digital cameras and printers use ARM technology. The 32-bit SIM smart card in the phone also uses ARM technology.
Figure. 1
ARM processor features:
1, small size, low power consumption, low cost, high performance;
2, support Thumb (16 bit)/ARM(32 bit) dual instruction set, can be very compatible with 8 bit /16 bit devices;
3, a large number of registers, instruction execution speed faster;
4. Most data operations are done in registers;
5, the addressing method is flexible and simple, high efficiency;
6. The instruction length is fixed;
Von Neumann system
Structural model:
Figure. 2
Characteristics of von Neumann's system:
1. Data and instruction are stored in the same storage area, and instruction and data fetching use the same data bus.
Used by most early computers.
3. ARM7 -- Von Neumann architecture is simple but slow. Fetching indicates that data cannot be fetched at the same time.
Harvard system
Structural model:
Figure. 3
Structural features:
1. Separate program memory from data memory.
2, provides a large memory bandwidth, each has its own bus.
3, suitable for digital signal processing.
4. Most DSPS are Harvard architectures.
ARM9 is a Harvard architecture. The Harvard architecture is divided into three stores: program, data, program, and data sharing.
Complex Instruction Set Computer
Features:
1, with a large number of instructions and addressing modes
2. The 8/2 rule: 80% of programs use only 20% of instructions
3. Most programs can be run using only a few instructions.
4. CISC CPUs contain a wealth of cell circuits, resulting in a powerful, large areas and high power consumption.
Reduced Instruction Set Computer (RISC)
Features:
1. Include only the most useful instructions in the channel, providing only simple operations.
2. Ensure that the data channel executes each instruction quickly.
3. Load-store -- The processor only processes data in registers. Load-store instructions are used to transfer data between registers and external storage.
4, make the CPU hardware structure design becomes more simple, RISC CPU contains fewer unit circuits, thus small area, low power consumption.
Main differences between RISC and CISC
1. Register
RISC instruction set: There are more general-purpose registers, each of which can hold data and addresses. Registers provide fast storage access for all data operations.
CISC instruction set: A special register used mostly for a specific purpose.
2. Load-store structure
RISC structure: THE Cpu only processes the data in the register, using an independent, dedicated load-store instruction to complete the data transfer between the register and external memory. (Access is time-consuming, processing and storage separate, can repeatedly use the data saved in the register, and avoid multiple access to the external memory).
CISC architecture: Can directly process data in memory.
ARM storage stores data in 8-bit units (one byte) and each storage unit is assigned a storage address.
ARM views memory as a linear combination of bytes starting at zero address. As a 32-bit microprocessor, the MAXIMUM addressing space supported by the ARM architecture is 4GB(232 bytes). The first stored word data is placed from zero to three bytes, and the second stored word data is placed from the fourth byte to the seventh byte, in order. 32-bit word data uses four address cells and 16-bit half data uses two address cells. Thus, there is a problem with ordering the stored word or half-word data. The ARM architecture can store word data in two ways, called big-endian and little-endian formats.
Big-endian format: High bytes of word data are stored in low addresses, and low bytes of word data are stored in high addresses.
Figure. 4
Low-endian: The opposite of the big-endian format. The low address stores the low byte of the word data, and the high address stores the high byte of the word data. The default value is small endian.
Figure. 5
ARM series products
Figure. 6
Classification of ARM processors
Classification based on instruction set architecture: V1, V2, V5, v5TEJ, v6, etc
Processor kernel based classification: ARM7, ARM9, ARM10, ARM11, Strong ARM, XScale, etc
ARM architecture version
ARM architecture has undergone great evolution since its birth. So far, the versions defined include V1, V2, V3, V4, V5 and V6.
V1 version of the architecture
This architecture was only seen in the prototype ARM1 and has the following basic features:
1. Basic data processing instructions (no multiplication)
LOAD/STORE instructions for bytes, half-words, and words
3. Transfer instruction, including subroutine call and link instruction
4. Software interrupt instruction
5, addressing space: 64M bytes (26)
V2 version of the architecture
This version of the architecture extends version V1, such as the ARM2 architecture, with the following features:
1, multiplication and multiplication plus instructions
2. Support coprocessor operation instructions
3. Fast interrupt mode
SWP/SWPB basic memory and register exchange instruction
5, addressing space: 64M bytes
V3 version of the architecture
1, increase the addressing space to 32 bits (4G bytes),
2. The current program state register CPSR and program state saving register SPSR are added to facilitate the processing of exceptions.
3. Added abort and undefined processor modes.
ARM6 uses this architecture.
5. Instruction set changes: MRS/MSR instructions were added to access the newly added CPSR/SPSR registers; Added the ability to return instructions from exception handling.
V4 version of the architecture
V4 version architecture is the most widely used ARM architecture at present, the V3 version architecture has been further expanded, some also introduced the 16-bit Thumb instruction set, making the use of ARM more flexible. ARM7, ARM8, ARM9, and Strong ARM all use this architecture.
The following functions have been added to the instruction set:
1. Load/Store instructions for signed, unsigned halfwords and signed bytes.
2. Added 16 bit Thumb instruction set
3. Improved the function of software interrupt SWI instruction
4. Added processor privilege mode.
V5 version of the architecture
This is the ARM architecture released in recent years, in V4 version basically added some new instructions, ARM10 and XScale are used in this version of the architecture, these new instructions are:
1. Transfer BLX instructions with linking and swapping
2. Count leading zero CLZ instruction
3, BKPT software breakpoint instruction
4. Added signal processing instructions
Add more optional instructions to the coprocessor
V6 version of the architecture
1, suitable for the use of battery powered portable equipment
2. Added SIMD function extension to improve the audio and video processing capacity of embedded application system.
From the perspective of application, the main factors to be considered when choosing ARM chips are as follows:
1. ARM core: If you want to use WinCE or Linux and other operating systems to reduce software development time, you need to choose ARM chips with MMU function above ARM720T.
2. System clock controller: The system clock determines the processing speed of ARM chip. The processing speed of the ARM7 chip is 0.9MIPS/MHz. The main clock of the COMMON ARM7 chip ranges from 20 MIPS to 133MHz, and the processing speed of the ARM9 chip is 1.1MIPS/MHz. The main clock of the common ARM9 chip ranges from 100 MIPS to 233MHz.
3. Internal memory capacity: When large capacity memory is not needed, ARM chips with built-in memory can be considered.
4. GPIO quantity: In the instructions provided by some chip suppliers, the maximum possible GPIO quantity is often stated, but many pins are multiplexed with address lines, data lines, serial lines and other pins. In this way, the actual number of GPIO that can be used needs to be calculated during system design.
5. USB interface: Many ARM chips have BUILT-IN USB controllers, some chips even have both USB Host and USB Slave controller.
6. interrupt controller: THE ARM kernel only provides fast interrupt (FIQ) and standard interrupt (IRQ) two interrupt vectors. However, various semiconductor manufacturers add their own interrupt controllers when designing chips to support hardware interrupts such as serial ports, external interrupts and clock interrupts. External interrupt control is an important factor to be considered in chip selection. Reasonable external interrupt design can greatly reduce the workload of task scheduling.
7. LCD controller: some ARM chips built-in LCD controller, some even built-in 64K color TFT LCD controller. When designing PDA and hand-held display and recording equipment, it is more suitable to choose ARM chip with built-in LCD controller.
8. Expansion bus: Most ARM chips have external SDRAM and SRAM expansion interfaces. The number of chips that can be expanded by different ARM chips is different, that is, the number of selected lines. Some special application ARM chips such as German Micronas ' PUC3030A have no external extension function.
9. packaging: the main packaging has QFP, TQFP, PQFP, LQFP, BGA, LBGA, and other forms, BGA packaging has the characteristics of small chip area, can reduce the area of the PCB board, but requires special welding equipment, can not be manual welding. In addition, general BGA packaged ARM chips cannot complete PCB wiring with double panels, requiring multi-layer PCB wiring.
The development of RISC architecture of ARM has provided low power consumption, small volume and high performance solutions. In order to solve the problem of code length, ARM architecture adds T variant and develops a new instruction system, namely Thumb instruction set, which is a major feature of ARM technology.
Thumb is an extension of the ARM architecture. It has 36 instruction formats pulled from the standard 32-bit ARM instruction set that can be rewritten into 16-bit opcodes. This leads to high code density.
The processor state of the ARM architecture that supports Thumb can be easily switched and run to the Thumb state, where the instruction set is a 16-bit Thumb instruction set.
Compare this to the ARM instruction set. The Thumb instruction set has the following limitations:
1. Thumb instructions usually require more instructions to complete the same operation, so THE ARM instruction set is more suitable for applications with strict requirements on system running time.
2. The Thumb instruction set does not contain some instructions needed for exception handling, so ARM instruction is still needed in case of exception interruption. This limitation determines that Thumb instruction needs to be used in conjunction with ARM instruction.
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