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This article mainly introduces the structure, principle, advantages and disadvantages of MOM, MIM and MOS capacitors and the difference between them.
In analog IC circuit design, we will often use capacitors. The capacitors inside the chip generally use metal as the upper and lower substrates. However, the disadvantage of this metal capacitor is that it consumes too much area. In some circuits that do not require very high capacitance, some people have thought of using MOSFETs as alternative parts.
There are generally three types of integrated capacitors in CMOS technology, namely MIM capacitors, MOM capacitors, and MOS capacitors. Both ends of MIM and MOM capacitors are metal, with high linearity, which can be used for OPA compensation capacitors, etc. MOS capacitors generally require grounding or power at one end. The linearity of MOS capacitors is poor. Generally, it is used for larger capacitors filtering.
MIM capacitor (Metal-Insulator-Metal): MIM capacitor is equivalent to a parallel plate capacitor. The two-layer metal on the top layer has a large spacing, and the formed capacitor has a small capacitance value.
MIM capacitors are generally composed of the top two layers of metal and a special metal layer in the middle. The structure of the MIM capacitor is as follows. The dielectric layer between CTM and Mt-1 is relatively thin, and the formed capacitor has a higher density.
MIM capacitors mainly use different layers of metals and the dielectric between them to form capacitors.
MIM capacitor structure
Advantages of MIM capacitors: Via and special processes can be used to connect odd-numbered layers (M9, M7, M5) and even-numbered layers (M8, M6, M4) respectively, which can increase the unit area capacitors.
MIM structure metal4-metal9
Disadvantages of MIM capacitors: In the 65nm process, even if the upper 9 layers of metal and Poly are used to build MIM, the unit area capacitor is only (1.4fF/micron square). The parasitic capacitor Cp can reach 10% of the total capacitor.
MIM circuit
MOM capacitor (Metal-Oxide-Metal): MOM capacitors are generally interdigitated capacitors formed by metal connections. The structure is as follows. With the advancement of process technology, metal wires can be closer together. At the same time, there will be many metal layers that can be used, so the capacitor density of this structure will be higher under advanced technology.
Different from MIM capacitors, MOM capacitors mainly use the same-layer metal interdigital structure to construct capacitors.
MOM structure
Advantages of MOM capacitors:
High unit capacitance
Low parasitic capacitor
Symmetrical plane structure
Excellent RF characteristics
Excellent matching characteristics
Compatible with metal wire process, no need to add additional process
In the advanced CMOS manufacturing process, MOM capacitors have become the most important capacitor structure. In the 28nm process, fixed capacitors have only the only MOM form.
The MOS capacitor (metal-oxide-semiconductor) is the heart of the MOSFET structure. The MOS capacitor itself is not a widely used device but is the core unit of the entire MOS transistor.
The gate capacitor of the MOS transistor can achieve a higher capacitor density. However, the capacitance value will vary with the difference of the gate voltage, which has a relatively large non-linearity. The transistor can work in the accumulation zone, depletion zone, and inversion zone.
A large number of inversion minority carriers are formed under the gate oxide layer in the inversion region, and a large number of multi-carriers are formed in the accumulation region. In these two areas, the MOS structure is similar to a parallel plate capacitor, and the capacitance is approximately equal to the gate oxide capacitor Cox.
As shown in the figure, it is a graph of the capacitance value of the MOS transistor with the gate voltage. In order to obtain better linearity, the MOS capacitor needs to work in the inversion region, that is, Vgs>Vth.
Variation of MOS capacitance with gate voltage
The MOS capacitor is an important part of the transistor. Like the PN junction, the MOS capacitor also has two ports.
MOS capacitors can be divided into three layers, the upper layer is a gate made of metal, the lower layer is a substrate made of semiconductor, and the middle layer is filled with oxide, usually SiO2. It has only two ports, gate, and substrate. The schematic diagram is as follows:
MOS capacitor structure
P-type semiconductor MOS capacitor structure: The metal at the top, called the gate, applies a negative bias voltage to the P-type semiconductor on the substrate.
The metal end of the gate will accumulate negative charges and present an electric field in the direction indicated by the arrow in the figure below.
PMOS capacitor
The mechanism of the MOS capacitor formed by N-type semiconductor is similar to that of P-type semiconductor. The figure below is a schematic diagram of the structure of an N-type semiconductor MOS capacitor. When a forward bias voltage is applied at the gate level, a positive charge is generated at the gate level, a corresponding electric field is induced, and an electron accumulation layer is generated at the oxide-semiconductor interface.
NMOS capacitor
In some processes, in order to avoid inversion, special MOS transistors form MOS capacitors, and NMOS transistors are placed in the n-well.
That is, when the gate voltage is 0, the MOS tube is already turned on, and the threshold voltage Vth is close to 0. When Vgs>0, the capacitance value tends to be stable. This structure is called an accumulation type MOS capacitor, often called native MOS. The figure below shows the structure of this type of capacitor.
Accumulation type MOS capacitor structure
The main principle of MOS transistor: forming a capacitor is to use the gate oxide between the gate and the channel as the insulating medium, the gate as the upper plate, and the three ends of the source and drain and the substrate are shorted together to form the lower plate.
Its source and drain are connected to the ground with the sinking bottom, and there is a voltage source on the gate.
When the power of the gate is large enough to exceed the threshold voltage Vth, an inversion layer will appear between the source and the drain, that is, channel formation. In this way, the gate oxide acts as an insulating medium between the gate and the channel, and a capacitor is formed.
The unit area size of this capacitor is related to the thickness and dielectric constant of the gate oxide. If the gate voltage is a voltage lower than the ground, the N-type channel between the source and the drain cannot be formed at this time, but the holes of the P-type substrate will accumulate under the gate oxide.
In this way, a capacitor is still formed between the gate and the substrate. The insulating medium at this time is still the gate oxide, so the size of the capacitor at this time is the same as that when the channel is formed.
If the gate voltage can neither form a channel between the source and drain nor can it cause holes in the P-type substrate to accumulate on the top. At this time, it can be considered that a space charge region will be formed under the gate oxide. This space charge region is the region formed by the combination of electrons and holes, so it is not charged and is an "insulator."
From this, you should be clear that this "insulator" will be superimposed with the gate oxide insulator, resulting in an increase in the thickness of the equivalent insulating medium, so the capacitance value will decrease accordingly.
The advantages and disadvantages of MOS capacitors:
The main advantages of MOS capacitors are area-saving and convenience. The disadvantage is that the MOS capacitor is actually a "voltage-controlled capacitor". When the pressure difference between the upper and lower plates changes, the capacitance value will change accordingly. This is almost fatal in circuits that require high precision. In the front-end analog circuit of weak signal acquisition, MOS capacitors are not suitable.
MIM capacitors: similar to plate capacitors, the capacitance value is more accurate, and the capacitance value does not change with the bias voltage. Generally, mTOP l & mTOP -1 are used in the manufacturing process. The capacitance value can be estimated by the upper board area * unit capacitance value. The upper and lower plate connections are not interchangeable, and are generally used in analog and RF processes.
MOM capacitor: Interdigital capacitor, which uses C between the edges of the same layer of metal. In order to save the area, multiple layers of metal can be stacked, and the number of metal layers in PDK can be selected.
MOM capacitors are generally only used in advanced manufacturing processes of multilayer metals. Because it is realized through the layout of multilayer wiring, the determinism and stability of the capacitance value obtained are not as good as MIM. Generally, it may be used in applications that do not require high capacitance values.
MOS capacitor: MOS transistor with two ends structure, the capacitance value is not accurate. It can realize the capacitance value that changes with the change of the control voltage, and the connection of the upper and lower plates is not interchangeable.
Comparison of the capacitance values of three capacitors with the same area: MIM<MOM, MIM is about 1/3 MOS capacitance value.
The advantage of the MOM capacitor is that no additional mask is required, and MIM requires an additional mask and process to be realized.
Catalogue
FPGA / CPLD
Memory
MOS 
MCU 
DSP
OCEP
Secondary 
Other 