Ⅰ. Introduction

When compared to the output of a low dropout (LDO) regulator, the output voltage of a standard switching regulator is considered to be fairly loud. The  LDO  voltage, on the other hand, might cause substantial additional thermal issues and complicate power supply design. To help build low-noise switching solutions that deliver low-noise performance equivalent to  LDO regulators, a full understanding of switching regulator noise is required. The buck regulator with current mode control, which is the most widely employed in applications, is the subject of this article's examination and evaluation. Switching ripple  noise, current broadband noise features (and their origins), and switching-induced high-frequency spikes are all studied using signal analysis. This article will discuss switching regulator PSRR  (Power Supply Rejection Ratio, which is important for input noise rejection) and signal analysis methods.

Ⅱ. Switching Ripple Noise

Based on fundamental and harmonic theory, this section introduces the formula for estimating the output ripple of a buck converter  . Because the peak-to-peak voltage amplitude in a switching regulator is typically a few mV to tens of mV, depending on the switching regulator topology and fundamental function, ripple is always the main noise. It should be regarded as a reliable and periodic signal. An oscilloscope in the time domain or Fourier decomposition in the frequency domain can easily identify and quantify it if it operates at a set switching frequency.

Buck Regulator Topology

A common buck regulator is depicted above. The two switches are alternately turned on and off, resulting in a perfect square wave at the SW node voltage VSW, which is then translated to the duty cycle and input voltage. The following formula can be used to calculate VSW:

VSW Formula Representation

The input voltage is denoted by  VIN . The duty cycle is equal to VOUT/VIN for a buck regulator. The fundamental and harmonic components of VSW are only dependent on the duty cycle once  VIN has been calculated. The VSW fundamental and harmonic amplitudes are shown against the duty cycle in figure below. The fundamental wave dominates the ripple amplitude when the duty cycle is close to half.

Buck Regulator VSW Amplitude vs. Duty Cycle

The output LC stage transfer function of a buck regulator is as follows:

LC Level Transfer Function

L stands for output inductance, DCR stands for inductance resistance, and CL stands for inductance parallel capacitance. The output capacity value is COUT. The capacitor series inductance value is denoted by ESL. The  ESR  is the value of the capacitor's series resistance. As a result, VOUT can be written as follows:

The Formula for VOUT

To make the computations easier, we'll use a 20 dB/decade output LC stage, followed by the VOUT ripple fundamental and harmonic amplitudes proportional to the duty cycle, as illustrated in figure below. The third or odd harmonics will be higher than the even harmonics when the duty cycle is close to half. Higher harmonics will have smaller amplitudes and a very small share of the total ripple amplitude due to LC suppression. In the switching regulator output ripple, the fundamental amplitude is also the main component.

Buck Regulator VOUT Ripple Amplitude vs. Duty Cycle

The input voltage, duty cycle, switching frequency, and LC stage all affect the fundamental amplitude of a buck regulator; nevertheless, all of these parameters affect application requirements like as efficiency and solution size. It is advised that a post-filter be used to further decrease the ripple.

Ⅲ. Broadband Noise

Broadband noise on the output voltage of switching regulators is random amplitude noise. It can be stated in V/Hz, which is inseparable from the noise density over the frequency range, or in V rms, which is inseparable from the noise density over the frequency range. Broadband noise  is primarily found in the 10 Hz to 1 MHz frequency range of the switching regulator due to restrictions in the silicon process and reference filter design, and it is difficult to minimize it by adding filters in the low frequency region.

The peak-to-peak amplitude voltage of a typical buck regulator is around 100V to 1000V, which is substantially lower than switching ripple noise.Broadband noise can become the main noise in the switching regulator's output voltage if additional filters are applied to reduce switching ripple noise.

Switching ripple is the main source of output noise for a buck regulator when there is no extra filter, as seen in the figure below. When additional filters are utilized, the predominant source of output noise is wideband noise, as seen in the figure below.

VOUT without additional filter

VOUT with Extra Filter (Measured with 1000x Preamp)

The regulator control scheme and module noise information must be gathered in order to identify and analyze switching regulator output broadband noise. Figure below depicts a common current-mode buck regulator control method with block noise source injection as an example.

Typical Current Mode Buck Regulator Control Scheme

There are two types of noise in the acquired control loop transfer function and block noise characteristic information: loop input noise and in-loop noise. Noise in the loop input is sent to the output within the control loop bandwidth, while noise outside the loop bandwidth is attenuated. Because unity feedback gain keeps the noise level constant rather than increasing as the output voltage level grows, creating low noise EAs and references is crucial for switching regulators. The most difficult task is identifying the major source of noise in the system and decreasing it in the circuit design. The ADP5014 combines a current-mode control method and a simple LC external filter to produce sub-20V rms noise performance spanning the 10Hz to 1 MHz frequency range, making it ideal for low-noise technology. Figure below depicts the ADP5014's output noise performance.

ADP5014 Output Noise Performance with Additional LC Filter

Ⅳ. High Frequency Spikes and Ringing

Because the output voltage is generated by the switching regulator turn-on or turn-off transients, the third type of noise is high frequency spikes and ringing noise. Fast current transients in buck regulators will create high frequency voltage spikes and ringing at the SW node due to parasitic inductance and capacitance in silicon circuits and PCB traces. The present load increases the spike and ringing sounds. Figure below depicts the formation of a spike by a buck regulator. The maximum peaking and ringing frequencies will be in the 20 MHz to 300 MHz region, depending on the switching regulator's on/off slew rate, and the output LC filter may not be particularly effective in rejection due to parasitic inductance and capacitance. In comparison to all of the previously discussed conduction channels, the radiated noise from the SW and VIN nodes is the worst; the output voltage and other analog circuits suffer as a result of its extremely high frequency.

Buck Regulator High-Frequency Spikes and Ringing Noise

Effective solutions for application and chip design implementation are advised to eliminate high-frequency spikes and ringing noise. On the termination load, an extra LC filter or bead should be utilized first. The spike noise on the output is often considerably smaller than the ripple noise, but it adds higher frequency components. Second, noise sources at the SW and input nodes should be insulated or kept away from sensitive analog circuits on the output side, as well as the output inductor. The design relies heavily on careful placement and routing. Third, reduce the SW node noise by optimizing the switching regulator's on/off slew rate and minimizing the parasitic inductance and resistance. Through chip design, ADI Silent Switcher® technology also helps to reduce VIN node noise.

Ⅴ. Switching Regulator PSRR

PSRR measures a switching regulator's ability to prevent input power supply noise from reaching the output. The PSRR performance of the buck regulator in the low-frequency band is examined in this section. The radiated path, rather than the conduction path, is where high-frequency noise has the most impact on the output voltage.

Current Mode Buck Small Signal Diagram from Input Voltage to Output

According to the buck small-signal diagram shown above, the buck PSRR  can be expressed as follows:

PSRR Representation

In it:

PSRR Representation2

Fm is the slope gain

F g is the control input voltage

Rcs is the current detection gain

Zo(s) is the output capacitance and load

Tv(s) is the loop transfer function

PSRR  Calculation Results Using Buck Small Signal Mode

PSRR  Simulation in SIMPLIS Mode

Compare the simulation findings to the signal mode calculations. The small-signal mode is correct, and the modeling results support that.

A switching regulator's PSRR  is determined by the loop gain performance in the low-frequency range. Input noise in the IF range is rejected by the switching regulator's built-in LC filter (100 Hz to 10 MHz). In this range, the rejection performance is substantially better than the LDO PSRR,  Switching regulators provide optimum PSRR  performance at low frequencies because of their large loop gain, whereas the inherent LC filter impairs the mid-frequency range.