Hi fellas. I am Rose. Today I will introduce the process of designing chips for you. Chips, also known as integrated circuits or VLSIs, are electronic circuits made up of thousands, millions, or even billions of transistors, resistors, and capacitors.

Ⅰ. What is a chip?

Chips, also known as integrated circuits or VLSIs, are electronic circuits made up of thousands, millions, or even billions of transistors, resistors, and capacitors. It accomplishes the same task as a bigger circuit made up of discrete (individually packaged) components, but the  IC  is a single unit built on a small piece of semiconductor material. Because silicon is the most common raw material used to make ICs, they are frequently referred to as "silicon chips." Other raw materials, such as germanium and gallium arsenide, can also be utilized, although silicon is the preferred option for several reasons:

Silicon is a semiconductor, which means it can behave as both a conductor and an insulator depending on the doping circumstances. Doping is the process of adding impurities to an element in order to affect its electrical properties.

Because silicon is abundant on the planet, it is fairly inexpensive.

Chips are purpose-built devices that can be employed in a variety of industries, including aerospace, automotive, telecommunications, and computers. To suit application requirements, one or more ICs, other components, and connectors are put on a printed circuit board (PCB) and connected with thin copper tape. A PCB is frequently used as a computer motherboard.

Ⅱ. Classification of chips

The classification of common chips, such as  ASIC ,  ASSP , SoC,  FPGA , SoC FPGA, ucontroller, uprocessor, and so on, is shown in the diagram below.

Application Specific Integrated Circuit (ASIC) is an acronym for Application Specific Integrated Circuit. It refers to an ASIC, which is an  IC developed for a specific application and found in electronic equipment such as routers, switches, and modems.

The main features of  ASIC are as follows:

Perform the same function throughout its life cycle

No processor

The design cycle is time-consuming and costly

Mass production

High speed and low power consumption

Can be digital, analog or both

ASSPs or Application Certain Standard Parts, are ICs that are developed for specific applications but are not tailored for systems or customers.  ASSP is a unique ASIC that can be utilized by a variety of businesses. ASSPs  have comparable features as ASICs. Ethernet controllers, PCIE controllers, USB interfaces, and other devices all use it.

SoC (System on Chip): A SoC is an IC that combines a complete system. The processor, memory, peripherals, and software are all housed here. A microprocessor  (P or MPU), a microcontroller  (C or  MCU ), a digital signal processor (DSP), or a graphics processor are all examples of SoC processors. Because an ASIC or ASSP with a processor is a SoC, its properties are identical to those of an ASIC or ASSP. Voice, video, and picture signal processing, wireless communication, cars, and other applications.

FPGA (Field Programmable Gate Array): FPGA is a programmable integrated circuit. It has programmable interconnects, configurable logic blocks, and configurable input-output blocks. Typically found in prototype ASICS or SoCs, device controllers, signal processing systems, and image processing systems, among other applications. The following are the main characteristics of FPGA:

Suitable for designs that require frequent customization

No processor

The design cycle is not time-consuming and low-cost

Suitable for small volume design

Lower speed and low power consumption

Programmable SoC or SoC FPGA: A programmable SoC or SoC  FPGA is an integrated circuit that combines peripherals, on-chip memory, FPGA-style logic arrays, and high-speed transceivers, as well as a CPU  and FPGA architecture. Typically utilized in network, aerospace, and national defense applications. The following are the primary characteristics of programmable SoC/SoC FPGA:

Suitable for designs that require frequent customization and processing capabilities

Smaller size

Higher bandwidth communication between processor and FPGA

The design cycle is not time-consuming and low-cost

Low risk because it is reprogrammable

Lower speed and low power consumption

Microprocessor (μP or MPU): A microprocessor  is an integrated circuit that simply contains a CPU  . It is devoid of any memory (RAM, ROM, etc.) or peripheral devices. Microprocessors have the following characteristics:

expensive

Higher speed and higher power consumption

Suitable for larger designs

Perform complex tasks

Application: desktop computers, notebook computers, notepads, cars, trains, etc.

Microcontroller (μC or MCU): A microcontroller  is an integrated circuit that contains a CPU.  memory (RAM, ROM, etc.), and various peripherals. Because this is a general-purpose device, it must be designed specifically for the application. Microcontrollers can be found in a wide range of industrial applications. The SoC has been reduced to a microcontroller,  The microcontroller  's primary characteristics are as follows:

Compact because all peripherals are in the IC

Has a processor

Cheaper than microprocessor 

Lower speed and low power consumption

Suitable for smaller designs because it is compact

Perform less complex tasks

Applications: Microwave ovens, washing machines, DVD players, mobile phones, etc.

Ⅲ. How is the chip designed?

The following figure reflects the IC design cycle (each step is explained in the following section):

System specifications

Potential clients meet with IC vendors to discover what features they want and to compile a list of feature needs. The process of specifying the functional specifications (or requirements) of a system (IC) and defining its external interfaces is known as system specification.

Architecture design

After the system specifications have been specified, the system architecture design process begins. This includes specifying software interfaces, timing, performance, area, and power constraints, as well as developing or purchasing intellectual property (IP) blocks. IP vendors can provide standard industrial IP modules.

Architecture verification

The process of creating a software version of a hardware system is known as architecture verification. A high-level language (such as C, C++, or SystemC) is used to generate this from a functional model. To evaluate the architecture, performance, and power of the entire system, use a software debugger.

Formal verification/attribute checking

Formal verification is a mathematical method for statically confirming the correctness of a design without utilizing any stimulus or timing tests.

To establish that the implemented system model matches the design criteria, a formal verification method known as attribute checking is utilized (or specifications). Attribute specification languages (like PSL and SVA) are used to express system requirements and generate a mathematical model of the existing system in attribute checking. To ensure that the system fits the criteria, use the model checker to compare the system requirements to the mathematical model.

Design input

The next step is design input, which comes after the system's architecture design and verification. This is the process of capturing the entire system design with the help of a hardware design language (HDL) (such as VHDL or Verilog) and/or schematic capture. I2C input and output pins, IP block samples, design connections, clocks, and reset techniques are all detailed in the design.

Functional simulation

The process of utilizing a software simulator to validate the functional behavior of a design is known as functional simulation. This does not account for the design element's temporal delay. It checks IC-level connectivity, IP blocks in the IC-level environment (which are usually pre-verified), end-to-end functional routes, pad connectivity, inter-module interaction, and external module interaction.

A test bench is a set of programs used to determine whether or not the RTL implementation meets the design standards (or does not). It includes both valid and expected conditions, as well as invalid and unexpected ones, to see if the design is working properly.

Formal verification-equivalence check

Formal verification, as previously stated, is a means of statically confirming the validity of a design using mathematical methods rather than stimulus or timing tests.

Equivalence checking is a formal verification method for determining the functional equivalence of a design by comparing it to a golden design. The equivalency check at each stage of the IC design cycle is depicted in the diagram below:

Pre-silicon verification

The practice of evaluating a design in hardware before sending it to manufacture is known as pre-silicon verification. It can test high-risk or newly produced IP without respinning the IC, saving money. Pre-silicon verification can be done with a simulator or an FPGA.

benefit:

Very fast compared to simulated environment

Can detect a limited set of internal signals for debugging

Software and application-level scenarios can be verified before tape out

limit:

Hardware is expensive

Unable to verify simulated IP block

Compared with the real chip, the system clock speed is slower

Multiple hardware setups are required, especially if the verification and software teams are distributed in multiple geographic locations

Simulation

The process of evaluating system functions on a hardware device known as an emulator is known as emulation. The simulator can run very big IC designs much faster than simulation and can run many IC designs at different clock speeds at the same time. The most advanced simulator is depicted in the diagram below:

FPGA-based prototyping

The method of validating system functions using one or more FPGAs is known as FPGA-based prototyping. The steps for FPGA prototyping are as follows:

The register transfer level (RTL) code from an ASIC is transformed to FPGA RTL code. It entails switching between memory, eliminating analog blocks, and rewriting clock algorithms, among other things.

If the entire FPGA RTL code is too large for a single FPGA, it will be split across several FPGAs.

Synthesis and place and route are done with FPGA tools.

The design is checked once the bit file is downloaded to the FPGA.

Synthesis

Given technical library and design limitations, synthesis is the process of translating intended RTL code into an optimal gate-level representation. In the synthesis, go through the following steps:

Design RTL code is converted to Boolean equations that are technology-independent.

Boolean equations should be optimized, and superfluous logic should be removed.

Technology mapping: Technology-independent Boolean equations are mapped to technology-related logic gates with the use of design restrictions and technology libraries.

Static timing analysis (STA)

The method of evaluating the timing characteristics of a design without giving any incentives is known as static timing analysis (STA). STA  is quick and thorough, but it does not test the design's functionality. Because electronic equipment is controlled by a clock signal, it is necessary to ensure that the design operates at the prescribed clock frequency. STA  is used at every stage of the IC design process.

Design for Test (DFT)

The process of making integrated circuits is not error-free. As a result, additional logic known as design-for-test (DFT) logic must be incorporated into the design to aid in the identification of manufacturing flaws during post-production testing of the IC. With the use of DFT logic, an IC is first checked for any manufacturing faults. Check the IC's functional accuracy if there are no manufacturing flaws.

Pre-layout simulation

The software application evaluates the functionality and timing behavior of the gate-level netlist before forwarding it to physical layout. Pre-layout simulation is the term for this.

Physical layout

The physical layout is the transition between the logical and physical views of the IC. A Graphic Database System (GDSII) file, which is a binary file format that encodes plane geometric objects, text labels, and other information related to the physical layout, is the outcome of the physical layout process. The following are the steps involved in the physical layout:

Determine the primary design blocks and distribute space to meet timing, area, and performance standards during layout planning. This is also where the IP structure, aspect ratio, and routing options are defined.

Partitioning: To make planning and routing easier, divide the IC into functional blocks.

Place and link design blocks in a way that does not contradict design standards.

Synthesis of a clock tree: The clock is distributed uniformly among all timing elements in the design.

Post-layout simulation

After the physical layout of the design has been developed, post-layout simulation is used to test the design. The following are the checks carried out during the post-layout simulation:

Design Rule Check (DRC): The layout meets a set of rules required for manufacturing

Electrical Rules Check (ERC): The layout meets a set of electrical design rules

Layout and Schematic (LVS): The layout is functionally the same as the designed netlist

Integrated circuit manufacturing

The layout netlist is sent to the IC manufacturer in the form of a GDSII file after the post-layout simulation (foundry). Carry-out refers to the procedure of delivering GDSII papers to the foundry. The following diagram depicts the IC manufacturing process:

IC tester

Manufacturing of integrated circuits is not 100 percent trustworthy, resulting in manufacturing flaws in many samples. A tester is used to filter the defective IC once it is received from the foundry. The tester gives the IC an input stimulus and checks the output. It also checks the IC's electrical and thermal characteristics and determines the best working settings.

IC Tester

Post-silicon verification

The samples that pass the test are put to the test in a real-world setting. This process is known as post-silicon verification. Use the software tool on the computer to configure the IC and download the test code to the IC during post-silicon verification. The predicted output is monitored, and all of the IC's functionalities are tested. The settings after verification are depicted in the diagram below:

Generalize

There are many different types of integrated circuits, each with its own set of features: programmable or non-programmable, with or without a CPU  , high or low speed, compact or bulky. The process of developing, producing, and testing integrated circuits is intricate and time-consuming. The design and verification team, IP providers, and IC makers are the key contributors. Advanced EDA tools are critical for lowering the time and effort required to complete the IC design cycle.