The CD4053BPWR is a triple 2-channel Analog Multiplexer having three separate digital control inputs, A, B and C and an inhibit input. Each control input selects one of a pair of channels which are connected in a single-pole, double-throw configuration. When these devices are used as demultiplexers, the channel IN/OUT terminals are the outputs and the COMMON OUT/IN terminals are the inputs. The device is digitally-controlled analog switches having low ON impedance and very low OFF leakage current. These multiplexer circuits dissipate extremely low quiescent power over the full VDD-VSS and VDD-VEE supply-voltage ranges, independent of the logic state of the control signals. When logic 1 is present at the inhibit-input terminal, all channels are off.
Feature
125R (typical) Low ON resistance over 15VP-P
18V Signal input range for VDD - VEE
±100pA (Typical) High OFF resistance, channel leakage at VDD-VEE = 18 V
Logic-level conversion for digital addressing signals
Binary address decoding on chip
100% Tested for quiescent current at 20V
1µA Maximum input current at 18V over full package temperature range, 100nA at 18V and 25°C
Break-before-make switching eliminates channel overlap
Catalogue
FPGA / CPLD
Memory
MOS 
MCU 
DSP
OCEP
Secondary 
Other 
