The ISL6617CRZ-T utilizes Intersil's proprietary Phase Doubler scheme to modulate two-phase power trains with single PWM input. It doubles the number of phases that Intersil'smulti-phase controllers ISL63xx can support. When the enable pin (EN_PH_SYNC) is pulled low, the PWM input is pulled high. This simplifies the phase shedding implementation for some Intersil controllers (VR10, VR11, VR11.1, and VR12 family) that can disable the respective and higher phase(s) by pulling the respective PWM line high. The ISL6617CRZ-T is designed to minimize the number of analog signals that interface between the controller and drivers in high phase count scalable applications. The common COMP signal, which is usually seen in conventional cascaded configuration, is not required; this improves noise immunity and simplifies the layout. Furthermore, the ISL6617CRZ-T provides low part count and low cost advantage over the conventional cascaded technique. By cascading the ISL6617CRZ-T with another ISL6617CRZ-T or ISL6611A, it can quadruple the number of phases that Intersil's multi-phase controllers ISL63xx can support. The ISL6617CRZ-T also features Tri-State input and outputs that recognize a high-impedance state, working together with Intersil multiphase PWM controllers and driver stages to prevent negative transients on the controlled output voltage when operation is suspended. This feature eliminates the need for the schottky diode that may be utilized in a power system to protect the load from excessive negative output voltage damage.
Feature
Proprietary Phase Doubler scheme with PhaseShedding Function (Patent Pending)
Enhanced Light to Full Load Efficiency
Double or Quadruple Phase Count
Patented Current Balancing with DCR Current Sensing and Adjustable Gain
Current Monitoring Output (IOUT) to Simplify System Interface and Layout
Triple-Level Enable Input for Mode Selection
Dual PWM Output Drives for Two Synchronous Rectified Bridges with Single PWM Input
Channel Synchronization and Two Interleaving Options
Tri-State PWM Input and Outputs for Output Stage Shutdown
Phase Enable Input and PWM Forced High Output to Interface with Intersil's Controller for Phase Shedding
Overvoltage Protection
Dual Flat No-Lead (DFN) Package - Near Chip-Scale Package Footprint; Improves PCB Utilization, Thinner Profile - Pb-Free (RoHS Compliant)