Features
• Single chip host based ISDN solution
• Based on IPAC PSB 2115, integrating ISAC-S and HSCX-TE functionality
• 8-bit parallel microcontroller interface, Motorola and Siemens/Intel bus type multiplexed or non-multiplexed,  direct-/indirect register addressing
• Serial control interface (SCI)
• Microcontroller access to all IOM-2 timeslots
• Various types of protocol support (Non-auto mode, transparent mode, extended transparent mode)
• B-channel HDLC controllers with 128 byte FIFOs
• Flexible access to 18-bit timeslots (2B+D) on IOM-2 for IDSL support
• D-channel HDLC controller with 64 byte FIFOs
• IOM-2 interface in TE, LT-T, LT-S and NT mode, single/double clocks and two strobe signals
• D-channel priority handler on IOM-2 for intelligent NT
applications
• Monitor channel handler (master/slave)
• IOM-2 MONITOR and C/I-channel protocol to control peripheral devices
• Full duplex 2B+D S/T-interface transceiver according to ITU-T I.430
• Conversion of the frame structure between the S/T-interface and IOM-2
• Receive timing recovery
• D-channel access control
• Activation and deactivation procedures with automatic activation from power down state

• Access to S and Q bits of S/T-interface

• Adaptively switched receive thresholds
• Auxiliary Interface with general purpose I/O pins and LED drivers
• Two programmable timers
• Watchdog timer
• Test loops
• Sophisticated power management for restricted power mode
• Power supply 3.3 V
• 3.3 V output drivers, inputs are 5 V safe
• Advanced CMOS technology

Feature