The HMC851LC3C is a XOR/XNOR gate function designed to support data transmission rates of up to 28 Gbps, and clock frequencies as high as 28 GHz. The HMC851LC3C also features an output level control pin, VR, which allows for loss compensation or for signal level optimization.
All input signals to the HMC851LC3C are terminated with 50 Ohms to ground on-chip, and may be either AC or DC coupled. The differential outputs of the HMC851LC3C may be either AC or DC coupled. Outputs can be connected directly to a 50 Ohm to ground terminated system, while DC blocking capacitors may be used if the terminating system is 50 Ohms to a nonground DC voltage. The HMC851LC3C operates from a single -3.3V DC supply, and is available in a ceramic RoHS compliant 3x3 mm SMT package.
Feature
Inputs Terminated Internally to 50 Ohms
Differential & Singe-Ended Operation
Propagation Delay: 97 ps
Fast Rise and Fall Times: 15 / 14 ps
Programmable Differential Output Voltage Swing: 500 - 1300 mV
Low Power Consumption: 241 mW typ.
Single Supply: -3.3V
16 Lead 3x3mm SMT Package: 9mm²
Applications
Catalogue
FPGA / CPLD
Memory
MOS 
MCU 
DSP
OCEP
Secondary 
Other 
