The OPAx333 series of CMOS operational amplifiers use a proprietary auto-calibration technique to simultaneously provide very low offset voltage (10μV, maximum) and near-zero drift over time and temperature. These miniature, high-precision, low quiescent current amplifiers offer high-impedance inputs that have a common-mode range 100 mV beyond the rails, and rail-to-rail output that swings within 50 mV of the rails. Single or dual supplies as low as 1.8 V (±0.9 V) and up to 5.5 V (±2.75 V) can be used. These devices are optimized for low-voltage, single-supply operation.
The OPAx333 family offers excellent CMRR without the crossover associated with traditional complementary input stages. This design results in superior performance for driving analog-to-digital converters (ADCs) without degradation of differential linearity.
The OPA333AIDBVR (single version) is available in the5-pin SOT-23, SOT, and 8-pin SOIC packages, while the OPA2333 (dual version) is available in the 8-pin VSON, SOIC, and VSSOP packages. All versions are specified for operation from –40°C to 125°C.
Feature
Low Offset Voltage: 10 μV (Maximum)
Zero Drift: 0.05 μV/°C (Maximum)
0.01-Hz to 10-Hz Noise: 1.1 μVPP
Quiescent Current: 17 μA
Single-Supply Operation
Supply Voltage: 1.8 V to 5.5V
Rail-to-Rail Input/Output
microSize Packages: SC70 and SOT23
Description
The OPAx333 series of CMOS operational amplifiers use a proprietary auto-calibration technique to simultaneously provide very low offset voltage (10μV, maximum) and near-zero drift over time and temperature. These miniature, high-precision, low quiescent current amplifiers offer high-impedance inputs that have a common-mode range 100 mV beyond the rails, and rail-to-rail output that swings within 50 mV of the rails. Single or dual supplies as low as 1.8 V (±0.9 V) and up to 5.5 V (±2.75 V) can be used. These devices are optimized for low-voltage, single-supply operation.
The OPAx333 family offers excellent CMRR without the crossover associated with traditional complementary input stages. This design results in superior performance for driving analog-to-digital converters (ADCs) without degradation of differential linearity.
The OPA333 (single version) is available in the5-pin SOT-23, SOT, and 8-pin SOIC packages, while the OPA2333 (dual version) is available in the 8-pin VSON, SOIC, and VSSOP packages. All versions are specified for operation from –40°C to 125°C.
Catalogue
FPGA / CPLD
Memory
MOS 
MCU 
DSP
OCEP
Secondary 
Other 
