Provides high-performance I/O expansion and switching functions between a PCIe upstream port and three downstream ports or peer-to-peer switching between downstream ports.
Feature
16 PCIe Gen1 Lanes, 4 Switch Ports
Switch architecture optimized for I/O Expansion
Supports root-to-peripheral (upstream-to-downstream) and peer-to-peer (downstream-to-downstream) data transfers
Internal buffering and flow control credits optimized for maximum bandwidth and large payloads
Low latency, Low power
Catalogue
FPGA / CPLD
Memory
MOS 
MCU 
DSP
OCEP
Secondary 
Other 
