The XC9572-15PQ100I is a 2.5V CPLD targeted for high-performance, low-voltage applications in leading-edge communications and computing systems. It is comprised of four 54V18 Function Blocks, providing 1,600 usable gates with propagation delays of 5 ns.
Feature
72 macrocells with 1,600 usable gates
Available in small footprint packages
Optimized for high-performance 2.5V systems
Low power operation
Multi-voltage operation
Advanced system features
In-system programmable
Superior pin-locking and routability with Fast CONNECT™ II switch matrix
Extra wide 54-input Function Blocks
Up to 90 product-terms per macrocell with individual product-term allocation
Local clock inversion with three global and one product-term clocks
Individual output enable per output pin
Input hysteresis on all user and boundary-scan pin inputs
Bus-hold ciruitry on all user pin inputs
Full IEEE Standard 1149.1 boundary-scan (JTAG)
Fast concurrent programming
Slew rate control on individual outputs
Enhanced data security features
Excellent quality and reliability
Catalogue
FPGA / CPLD
Memory
MOS 
MCU 
DSP
OCEP
Secondary 
Other 
