FEATURES· Supply Input Voltage: Supports 3.3-V Rail and 5-V Rail
· VLDOIN Input Voltage Range: VTT+0.4V to 3.5V
· VTT Termination Regulator
-Output Voltage Range:0.5V to 0.9V
-2-A Peak Sink and Source Current
-Requires Only 10-uF MLCC Output Capacitor
-±20 mV Accuracy
· VTTREF Buffered Reference
-VDDQ/2±1% Accuracy
-10-mA Sink/Source Current
· Supports High-Z in S3 and Soft-Stop in S4/S5 with S3/S5 Inputs
· Over Temperature Protection
·10-pin 2mmx2mm SON(DSQ) Package
APPLICATIONS
·DDR2/DDR3/DDR3L Memory Power Supplies
·SSTL_18,SSTL_15,SSTL_135 and HSTL Termination
DESCRIPTION
The TPS51206 is a sink/source double date rate (DDR) termination regulator with VTTREF buffered reference output. It is specifically designed for low input voltage, low cost, low external component count systems where space is a key consideration. The TPS51206 maintains fast transient response and only requires 1× 10-uF of ceramic output capacitance.
The TPS51206 supports a remote sensing function and all power requirements for DDR2, DDR3 and Low-Power DDR3 (DDR3L) VTT bus. The VTT current capability is ±2A peak. The TPS51206
supports all of the DDR power states, putting VTT to High-Z in S3 state(suspend to RAM) and discharging VTT and VTTREF in S4/S5 state(suspend to disk).
The TPS51206 is available in 10-pin,2×2, SON (DSQ) PowerPADTM package and specified from-40℃ to 85℃.
Feature
Independent Dual-Outputs Operate 180° Out of Phase
Wide Input Voltage Range: 4.5-V – 28-V
Adjustable Output Voltage Down to 0.9 V
Pin-Selectable PWM/SKIP Mode for High Efficiency Under Light Loads
Synchronous Buck Operation Allows up to 95% Efficiency
Separate Standby Control and Overcurrent Protection for Each Channel
Programmable Short-Circuit Protection
Low Supply (1 mA) and Shutdown (1 nA) Current
Power Good Output
High-Speed Error Amplifiers
Sequencing Easily Achieved by Selecting Softstart Capacitor Values.
5-V Linear Regulator Power Internal IC Circuitry
30-Pin TSSOP Packaging
Catalogue
FPGA / CPLD
Memory
MOS 
MCU 
DSP
OCEP
Secondary 
Other 
