The ’LV86A devices are quadruple 2-input exclusive-OR gates designed for 2-V to 5.5-V VCC operation.
These devices contain four independent 2-input exclusive-OR gates. They perform the Boolean function Y = A ⊕ B or Y = B in positive logic.
A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the output.
Feature
2-V to 5.5-V VCC Operation
Max tpd of 8 ns at 5 V
Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C
Support Mixed-Mode Voltage Operation on All Ports
Latch-Up Performance Exceeds 250 mA per JESD 17
ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
1000-V Charged-Device Model (C101)
Description
The ’LV86A devices are quadruple 2-input exclusive-OR gates designed for 2-V to 5.5-V VCC operation.
These devices contain four independent 2-input exclusive-OR gates. They perform the Boolean function Y = A ⊕ B or Y = B in positive logic.
A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the output.
Catalogue
FPGA / CPLD
Memory
MOS 
MCU 
DSP
OCEP
Secondary 
Other 
