The XC95144XL-10TQ100C is a 3.3V CPLD targeted for high-performance, low-voltage applications in leading-edge communications and computing systems. It is comprised of eight 54V18 Function Blocks, providing 3,200 usable gates with propagation delays of 5 ns.
Feature
5 ns pin-to-pin logic delays
System frequency up to 178MHz
144 macrocells with 3,200 usable gates
Fast concurrent programming
Slew rate control on individual outputs
Enhanced data security features
In-system programmable
Superior pin-locking and routability with Fast CONNECT™ II switch matrix
Extra wide 54 input Function Blocks
Up to 90 product-terms per macrocell with individual product-term allocation
Local clock inversion with three global and one product-term clocks
Individual output enable per output pin with local inversion
Input hysteresis on all user and boundary-scan pin inputs
Endurance exceeding 10,000 program/erase cycles
20 year data retention
Catalogue
FPGA / CPLD
Memory
MOS 
MCU 
DSP
OCEP
Secondary 
Other 
