The TMS320F28035PAGT is a 32-bit Piccolo Microcontroller provides the power of the C28x core and control law accelerator (CLA) coupled with highly integrated control peripherals in low pin-count devices. This family is code-compatible with previous C28x-based code, as well as providing a high level of analog integration. An internal voltage regulator allows for single-rail operation. Enhancements have been made to the HRPWM module to allow for dual-edge control (frequency modulation). Analog comparators with internal 10-bit references have been added and can be routed directly to control the PWM outputs. The ADC converts from 0 to 3.3V fixed full-scale range and supports ratio-metric VREFHI/VREFLO references. The ADC interface has been optimized for low overhead and latency.
Feature
High-efficiency 32-bit CPU ( TMS320C28x™)
16 x 16 and 32 x 32 MAC operations
16 x 16 Dual MAC
Harvard bus architecture
Atomic operations
Fast interrupt response and processing
Unified memory programming model
Code-efficient (in C/C++ and assembly)
Endianness - little endian
JTAG boundary scan support
No power sequencing requirement
Integrated power-on and brown-out resets
Two internal zero-pin oscillators
On-chip crystal Oscillator/External clock input
Dynamic PLL ratio changes supported
Watchdog timer module
Missing clock detection circuitry
Peripheral interrupt expansion (PIE) block that supports all peripheral interrupts
Three 32-bit CPU timers
Independent 16-bit timer in each ePWM module
Catalogue
FPGA / CPLD
Memory
MOS 
MCU 
DSP
OCEP
Secondary 
Other 
