The CAT24C512WI-GT3 is a 512kb I²C CMOS Serial EEPROM internally organized as 65536 words of 8-bit each. It features a 128-byte page write buffer and supports the standard 100kHz, fast 400kHz and fast-plus 1MHz I²C protocol. Write operations can be inhibited by taking the WP pin high (this protects the entire memory). External address pins make it possible to address up to eight CAT24C512WI-GT3 devices on the same bus. On-chip ECC (Error Correction Code) makes the device suitable for high reliability applications.
Feature
Hardware write protection for entire memory
Schmitt triggers and noise suppression filters on I²C bus inputs (SCL and SDA)
Low power CMOS technology
1000000 Program/erase cycles
100 years Data retention
Catalogue
FPGA / CPLD
Memory
MOS 
MCU 
DSP
OCEP
Secondary 
Other 
