The devices have a 12 kΩ receiver input impedance, which allows up to 32 transceivers on a bus. Because only one driver should be enabled at any time, the output of a disabled or powered-down driver is tristated to avoid overloading the bus.
The receiver has a fail-safe feature that ensures a logic high output when the inputs are floating. Excessive power dissipation caused by bus contention or by output shorting is prevented with a thermal shutdown circuit.
The part is fully specified over the industrial temperature rangeand is available in an 8-lead narrow SOIC package.
APPLICATIONS
Feature
TIA/EIA RS-485/RS-422 compliant
±15 kV ESD protection on RS-485 input/output pins
12 Mbps data rate
Half-duplex transceiver
Up to 32 nodes on the bus
Receiver open-circuit, fail-safe design
Low power shutdown current
Outputs high-Z when disabled or powered off
Common-mode input range: −7 V to +12 V
Thermal shutdown and short-circuit protection
Industry-standard 75176 pinout
8-lead narrow SOIC package
(Picture: Pinout)
(Picture: Diagram)
Catalogue
FPGA / CPLD
Memory
MOS 
MCU 
DSP
OCEP
Secondary 
Other 
