Features include a high performance enhanced infrastructure, large on-chip memory and a feature rich peripheral set with expanded connectivity options including USB 2.0 HS OTG, 2 10/100 Ethernet MACs, and Removable Storage Interface (RSI).
In addition to these the ADSP-BF607BBCZ-5 processor contains features for safety-critical applications, including a CRC for memory protection, Parity and ECC protection in the internal memory blocks and a Fault Management Unit.
Feature
2 Blackfin cores capable of 500 MHz/1000 MMACs (2000 MMACs total) for demanding signal processing applications.
552 K bytes of on-chip SRAM composed of 148kB of L1 SRAM per core with parity support and a shared L2 256kB SRAM with ECC support.
Fully integrated DMA controller supporting DMA transfers to and from all on-chip and off-chip memories and peripherals.
3x Enhanced Parallel Peripheral Interfaces (ePPIs) supporting up to 24-bit data widths, ITU-R BT.656 modes, and direct connection to TFT LCD panels, parallel converters, video encoders and decoders, image sensors, and other general-purpose peripherals.
3 synchronous serial ports (SPORTs) supporting I2S, Packed I2S, left-justified sample pair, and TDM modes.
USB 2.0 HS OTG.
Removable Storage Interface (RSI).
Controller Area Network (CAN) Interface.
2 10/100 Ethernet MACs with IEEE 1588 support.
4 Link Ports supporting 8-bit wide DMA enabled data transfer.
2 Watch Dog Timers and 8 Timer/Counters with PWM support.
CRC engine.
2 SPI-compatible ports supporting master and slave modes.
2 UART and 2 Two-Wire Interfaces.
2 16-bit Pulse Width Modulation (PWM) channels.
19x19 mm CSP BGA package.
Commercial and Industrial temperature ranges available.
(Picture: Diagram)
Catalogue
FPGA / CPLD
Memory
MOS 
MCU 
DSP
OCEP
Secondary 
Other 
