Spartan®-6 LX and LXT FPGAs are available in various speed grades, with -3 having the highest performance. The DC and AC electrical parameters of the Automotive XA Spartan-6 FPGAs and Defense-grade Spartan-6Q FPGAs devices are equivalent to the commercial specifications except where noted. The timing characteristics of the commercial (XC) -2 speed grade industrial device are the same as for a -2 speed grade commercial device. The -2Q and -3Q speed grades are exclusively for the expanded (Q) temperature range. The timing characteristics are equivalent to those shown for the -2 and -3 speed grades for the Automotive and Defense-grade devices.
Spartan-6 FPGA DC and AC characteristics are specified for commercial (C), industrial (I), and expanded (Q) temperature ranges. Only selected speed grades and/or devices might be available in the industrial or expanded temperature ranges for Automotive and Defense-grade devices. References to device names refer to all available variations of that part number (for example, LX75 could denote XC6SLX75, XA6SLX75, or XQ6SLX75). The Spartan-6 FPGA -3N speed grade designates devices that do not support MCB functionality.
All supply voltage and junction temperature specifications are representative of worst-case conditions. The parameters included are common to popular designs and typical applications.
Feature
Spartan-6 Family:
Designed for low cost
Multiple efficient integrated blocks
Optimized selection of I/O standards
Staggered pads
High-volume plastic wire-bonded packages
Low static and dynamic power
45 nm process optimized for cost and low power
Hibernate power-down mode for zero power
Suspend mode maintains state and configuration with multi-pin wake-up, control enhancement
Lower-power 1.0V core voltage (LX FPGAs, -1L only)
High performance 1.2V core voltage (LX and LXT FPGAs, -2, -3, and -3N speed grades)
Multi-voltage, multi-standard SelectIO™ interface banks
Up to 1,080 Mb/s data transfer rate per differential I/O
Selectable output drive, up to 24 mA per pin
3.3V to 1.2V I/O standards and protocols
Low-cost HSTL and SSTL memory interfaces
Hot swap compliance
Adjustable I/O slew rates to improve signal integrity
High-speed GTP serial transceivers in the LXT FPGAs
Up to 3.2 Gb/s
High-speed interfaces including: Serial ATA, Aurora, 1G Ethernet, PCI Express, OBSAI, CPRI, EPON, GPON, DisplayPort, and XAUI
Integrated Endpoint block for PCI Express designs (LXT)
Low-cost PCI® technology support compatible with the 33 MHz, 32- and 64-bit specification.
Efficient DSP48A1 slices
High-performance arithmetic and signal processing
Fast 18 x 18 multiplier and 48-bit accumulator
Pipelining and cascading capability
Pre-adder to assist filter applications
Integrated Memory Controller blocks
DDR, DDR2, DDR3, and LPDDR support
Data rates up to 800 Mb/s (12.8 Gb/s peak bandwidth)
Multi-port bus structure with independent FIFO to reduce design timing issues
Abundant logic resources with increased logic capacity
Optional shift register or distributed RAM support
Efficient 6-input LUTs improve performance and minimize power
LUT with dual flip-flops for pipeline centric applications
Block RAM with a wide range of granularity
Clock Management Tile (CMT) for enhanced performance
Low noise, flexible clocking
Digital Clock Managers (DCMs) eliminate clock skew and duty cycle distortion
Phase-Locked Loops (PLLs) for low-jitter clocking
Frequency synthesis with simultaneous multiplication, division, and phase shifting
Sixteen low-skew global clock networks
Simplified configuration, supports low-cost standards
2-pin auto-detect configuration
Broad third-party SPI (up to x4) and NOR flash support
Feature rich Xilinx Platform Flash with JTAG
MultiBoot support for remote upgrade with multiple bitstreams, using watchdog protection
Enhanced security for design protection
Faster embedded processing with enhanced, low cost, MicroBlaze™ soft processor
Industry-leading IP and reference designs
Catalogue
FPGA / CPLD
Memory
MOS 
MCU 
DSP
OCEP
Secondary 
Other 
