The CAT25512YI-GT3 is a EEPROM Serial 512-Kb SPI device internally organized as 64kx8 bits. This features a 128-byte page write buffer and supports the Serial Peripheral Interface (SPI) protocol. The device is enabled through a Chip Select (CS) input. In addition, the required bus signals are clock input (SCK), data input (SI) and data output (SO) lines. The HOLD input may be used to pause any serial communication with the CAT25512YI-GT3 device. The device features software and hardware write protection, including partial as well as full array protection.On-Chip ECC (Error Correction Code) makes the device suitable for high reliability applications.
Feature
1.8 V to 5.5 V Supply Voltage Range
Single power supply from 1.8V to 5.5V: allows multiple applications / various VCC values using the same device.
SPI Modes (0,0) & (1,1)
SPI interface protocol / industry standard; 20MHz clock enables faster operation; High Reliability
SOIC, TSSOP 8-lead and UDFN 8-pad Packages
Space-eficient packaging
20 MHz SPI Compatible
128-byte Page Write Buffer
Additional Identification Page with Permanent Write Protection
Self-timed Write Cycle
Hardware and Software Protection
Block Write Protection - Protect 1/4, 1/2 or Entire EEPROM Array
Low Power CMOS Technology
1,000,000 Program/Erase Cycles
100 Year Data Retention
Industrial Temperature Range
This Device is Pb-Free, Halogen Free/BFR Free, and RoHS Compliant
Catalogue
FPGA / CPLD
Memory
MOS 
MCU 
DSP
OCEP
Secondary 
Other 
