ISP memory zone could be optioned as 0.5KB/1.0KB~7.5KB

Flexible IAP size by software configured

Code protection for flash memory access

Flash write/erase cycle: 20,000 times

Flash data retention: 100 years at 25℃

Default MG82F6D64 Flash space mapping

On-chip 256 bytes scratch-pad RAM

3840 bytes expanded RAM (XRAM)

Support page select on XRAM access

Only support No Address mode access (LCD 8080 I/F)

P2P, M2P, P2M

Memory target: on-chip XRAM & EMB

Peripheral target: UART0/1/2/3, SPI, TWI0/I2C0, I2C1, ADC12, EMB & CRC16

Timer 5 and Timer 6 are used for DMA, but it also can be traded as independent timer when DMA not in use

24 sources, four-level-priority interrupt capability

Four external interrupt inputs, nINT0, nINT1, nINT2 and nINT3, with glitch filter

All external interrupts support High/Low level or Rising/Falling edge trigger

RTC Timer and WDT Timer

Timer 0, Timer 1, Timer 2, Timer3 and Timer 4

PCA0, Program Counter Array 0

S0 BRG, S1 BRG, S2 BRG and S3 BRG

If Timer 2/3/4 in split mode, then total 17 timers

Timer 5/6 of DMA module also can be used as timer

X12 mode and timer clock output function

Synchronous control of Run-Enable, Stop and Reload on Timer 0~4

New 5 operating modes in Timer 2/3/4 with 8 clock sources and 8 capture sources

Timer 2/3/4 can be split to two 8-bit timers

Clock Count Output (CCO) on T2CKO, T3CKO and T4CKO

Timers 0~4 support PWM mode

Timer 2/3/4 support Duty Capture function

PCA0 has 6 CCP (Capture/Compare/PWM) modules and 2 CP (Compare/PWM) modules

Reloadable 16-bit base counter to support variable length PWM

Up to 144MHz clock source from on-chip CKM

Capture mode, 16-bit software timer mode and High speed output mode

Buffered capture mode to monitor narrow pulse input

Variable 8/10/12/16-bit PWM mode, the PCA can be configured to:

PCA0 PWM module 0~5 with dead-time control, break control and central-aligned option

Multi-source modulator and selectable carrier source

Support fast Event Break function

Programmable throughput up to 1.2M sps

16 channel external inputs and 2 channel for internal reference voltage (IVR/1.4V) and internal VSS

Support window detect function on ADC result

Support channel scan mode

ADC VREF+ from external input

Selectable internal voltage reference (IVR/1.4V) on ACNI0

4 selectable ACPI0(+) inputs

Wake-up from power-down and idle

Glitch filter option and output to internal timer capture

Selectable internal voltage reference (IVR/1.4V) on ACNI1/ACNI2

Wake-up from power-down and idle

Glitch filter option and output to internal timer capture

Framing Error Detection

Automatic Address Recognition

Max. UART baud rate up to 3.6864MHz/ 6MHz

Support SPI Master in Mode 4, up to 12MHz on SPICLK

Built-in baud rate generator (S0BRG) to support TX or RX on different baud rate

Support LIN bus protocol with auto baud rate detection in mode 5

S0BRG in timer mode cascaded with Timer 0/1 to be a 16/24-bit timer/counter

Max. UART baud rate up to 1.8432/3.0MHz

Support SPI Master in Mode 4, up to 12MHz on SPICLK

Max. 24MHz SPICLK on SPI master

Max. 12MHz on SPI master

QPI mode support

Up to 5 SPI masters including S0/S1 in mode 4

Support daisy-chain function in SPI slave mode

Two Master/Slave hardware engine: TWI0/I2C0 and TWI1/I2C1

Max. 1MHz on I2C0/I2C1 master mode and Max. 400KHz on I2C0/I2C1 slave mode

One software TWI/I2C, STWI/SI2C, Start/Stop serial interface detection (SID)

Multiple slave address recognition on I2C0/I2C1

One time enabled by CPU or power-on

Interrupt CPU or Reset CPU on WDT overflow

Support WDT function in power down mode (watch mode) for auto-wakeup function

Programmable interrupt period from mini-second wakeup to minute wakeup

21-bit length system timer

Bit order reversed function

16-bit CRC engine (CCITT-16 polynomial)

Support automatic CRC of flash content

Programmable initial seed function of CRC

P3 can be configured to quasi-bidirectional, push-pull output, open-drain output and input only

P0, P1, P2, P4, P5, P6 and P7 can be configured to open-drain output or push-pull output

P6.0, P6.1 and P4.7 shared with XTAL2, XTAL1 and RST

Programmable GPIO driving strength and driving speed

On chip pull-up enable on each pin

Internal 12MHz/11.059MHz oscillator (IHRCO): factory calibrated to ±1%, typical

External crystal mode, support 32.768KHz oscillating and missing clock detection (MCD)

Internal Low power 32KHz RC Oscillator (ILRCO)

External clock input (ECKI) on P6.0/XTAL2, up to 25MHz

Internal RC Oscillator output on P6.0/XTAL2

On-chip Clock Multiplier (CKM) to provide high speed clock source (144MHz/96MHz)

BOD0: detect 1.7V

BOD1: selected detection level on 4.2V/3.7V/2.4V/2.0V

Interrupt CPU or reset CPU

Wake up CPU in Power-Down mode (BOD1)

All interrupts can wake up IDLE mode

19 sources with 23 pins to wake up Power-Down mode

Slow mode and sub-clock mode support low speed MCU operation

RTC mode supports RTC to resume CPU in power down

Watch mode supports WDT to resume CPU in power down

Monitor mode supports BOD1 to resume CPU in power down

Minimum 1.8V requirement in flash write operation (ISP/IAP/ICP)

External clock input mode, 0 – 12MHz @ 2.0V – 5.5V, 0 – 25MHz @ 2.4V – 5.5V

CPU up to 12MHz @ 1.8V – 5.5V and up to 25MHz @ 2.2V – 5.5V

CPU up to 36MHz @ 2.7V – 5.5V with on-chip CKM

Industrial (-40℃ to +105℃)*

LQFP64(7 x 7 mm): MG82F6D64AD64 (64K)

LQFP48(7 x 7 mm): MG82F6D64AD48 (64K)

QFN48(6 x 6 x 0.75 mm): MG82F6D64AY48 (64K)