USB 3.0 compatible
Four 5.0 Gbps differential signal pairs
Adjustable Receiver Equalization
100Ω Differential CML I/O’s
Pin Configured Output Emphasis Control
Input signal level detect and squelch for each channel
Automatic Receiver Detect with digital enable/disable
Low Power ~680mW
Auto "Slumber" mode for adaptive power management
Stand-by Mode – Power Down State
Single Supply Voltage: 3.3V
Packaging: 42-Contact TQFN (3.5x9mm)
Catalogue
FPGA / CPLD
Memory
MOS 
MCU 
DSP
OCEP
Secondary 
Other 
