The STM32F469xx devices are based on the high-performance ARM®Cortex?-M4 32-bit RISC core operating at a frequency of up to 180 MHz. The Cortex?-M4 core features a Floating point unit (FPU) single precision which supports all ARM? single-precision data-processing instructions and data types. It also implements a full set of DSP instructions and a memory protection unit (MPU) which enhances application security.
The STM32F469xx devices incorporate high-speed embedded memories (Flash memory up to 2 Mbytes, up to 384 Kbytes of SRAM), up to 4 Kbytes of backup SRAM, and an extensive range of enhanced I/Os and peripherals connected to two APB buses, two AHB buses and a 32-bit multi-AHB bus matrix.
All devices offer three 12-bit ADCs, two DACs, a low-power RTC, twelve general-purpose 16-bit timers including two PWM timers for motor control, two general-purpose 32-bit timers, and a true random number generator (RNG), and a cryptographic acceleration cell. They also feature standard and advanced communication interfaces.
Feature
Up to 2 MB of Flash memory organized into two banks allowing read-while-write
Up to 384+4 KB of SRAM including 64-KB of CCM (core coupled memory) data RAM
Flexible external memory controller with up to 32-bit data bus: RAM,PSRAM,SDRAM/LPSDR SDRAM, Flash NOR/NAND memories
Dual-flash mode Quad SPI interface
Graphics:
Chrom-ART Accelerator (DMA2D), graphical hardware accelerator enabling enhanced graphical user interface with minimum CPU load
LCD parallel interface, 8080/6800 modes
LCD TFT controller supporting up to XGA resolution
MIPI DSI host controller supporting up to 720p 30Hz resolution
Clock, reset and supply management
1.7 V to 3.6 V application supply and I/Os
POR, PDR, PVD and BOR
4-to-26 MHz crystal oscillator
Internal 16 MHz factory-trimmed RC (1% accuracy)
32 kHz oscillator for RTC with calibration
Internal 32 kHz RC with calibration
Sleep, Stop and Standby modes
VBATsupply for RTC, 20×32 bit backup registers + optional 4 KB backup SRAM
3×12-bit, 2.4 MSPS ADC: up to 24 channels and 7.2 MSPS in triple interleaved mode
2×12-bit D/A converters
General-purpose DMA: 16-stream DMA controller with FIFOs and burst support
Up to 17 timers: up to twelve 16-bit and two 32-bit timers up to 180 MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input. 2x watchdogs and SysTick timer
Debug mode
(Picture: Diagram)
Catalogue
FPGA / CPLD
Memory
MOS 
MCU 
DSP
OCEP
Secondary 
Other 
