In-system programming (ISP) and In-application programming (IAP)

EmbeddedICE RT and embedded trace interfaces

Four interconnected CAN interfaces with advanced acceptance filters

Serial interfaces are two UARTs (16C550), Fast I2C-bus (400 Kbit/s) and two SPIs

Two 32-bit Timers/external event counters, PWM unit and watchdog

Vectored interrupt controller with configurable priorities and vector addresses

Up to forty-six 5V tolerant GPIO, up to 9 edge or level sensitive external interrupt pins available

60MHz Maximum CPU clock available from programmable on-chip PLL

On-chip crystal oscillator with an operating range of 1MHz to 30MHz

Two low power modes, Idle and power-down

Processor wake-up from power-down mode via external interrupt

Individual enable/disable of peripheral functions for power optimization

Fast GPIO ports enable port pin toggling up to 3.5 times faster than the original device

Dedicated result registers for ADC(s) reduce interrupt overhead

The ADC pads are 5V tolerant when configured for digital I/O function

UART0/1 include fractional baud rate generator, auto-bauding capabilities and handshake flow-control

Buffered SSP serial controller supporting SPI, 4-wire SSI and microwire formats

SPI programmable data length and master mode enhancement

Diversified code read protection (CRP)

General purpose timers can operate as external event counters