True Low Power Platform (as low as 66 µA/MHz, and 0.57 µA for RTC + LVD), 1.6 V to 5.5 V operation, 16 to 512 Kbyte Flash, 41 DMIPS at 32 MHz, for General Purpose Applications
Feature
Ultra-low power consumption technology
RL78 CPU core
CISC architecture with 3-stage pipeline
Code flash memory: 16 to 512 KB
Data flash memory: 4 KB to 8 KB
Select from 32MHz, 24MHz, 16MHz, 12MHz, 8MHz, 6MHz, 4MHz, 3MHz, 2MHz, and 1MHz
On-chip power-on-reset (POR) circuit
DMA (Direct Memory Access) controller
CSI: 2 to 8 channels
UART/UART (LIN-bus supported): 2 to 4 channels
I2C/Simplified I2C communication: 2 to 8 channels
Timers
A/D converters
Catalogue
FPGA / CPLD
Memory
MOS 
MCU 
DSP
OCEP
Secondary 
Other 
