All trademarks are the property of their respective owners.
Description
The TPS54260DGQR device is a 60-V, 2.5-A, step-down regulator with an integrated high-sideMOSFET. Current mode control provides simple external compensation and flexible componentselection. A low-ripple, pulse skip mode reduces the no load, regulated output supply current to138 μA. Using the enable pin, shutdown supply current is reduced to 1.3 μA, when the enable pin is low.
Undervoltage lockout (UVLO) is internally set at 2.5 V, but can be increased using the enable pin. The output voltage startup ramp iscontrolled by the slow-start pin that can also be configured for sequencing and tracking. Anopen-drain powergood signal indicates the output is within 94% to 107% of its nominalvoltage.
A wide switching frequency range allows efficiency and external component size to beoptimized. Frequency foldback and thermal shutdown protects the part during an overloadcondition.
The TPS54260DGQR is available in 10-pin thermally enhanced MSOP and 10-pin 3-mm × 3-mm SONPowerPAD packages.
Feature
3.5-V to 60-V Input Voltage Range
200-m? High-Side MOSFET
High Efficiency at Light Loads With a Pulse-Skipping Eco-mode?
138-μA Operating Quiescent Current
1.3-μA Shutdown Current
100-kHz to 2.5-MHz Switching Frequency
Synchronizes to External Clock
Adjustable Slow Start and Sequencing
UV and OV Powergood Output
Adjustable UVLO Voltage and Hysteresis
0.8-V Internal Voltage Reference
10-Pin MSOP and10-Pin 3-mm × 3-mm VSON WithPowerPAD? Packages
Create a Custom Design Using the TPS54260 WithWEBENCH? PowerDesigner
All trademarks are the property of their respective owners.
Description
The TPS54260 device is a 60-V, 2.5-A, step-down regulator with an integrated high-sideMOSFET. Current mode control provides simple external compensation and flexible componentselection. A low-ripple, pulse skip mode reduces the no load, regulated output supply current to138 μA. Using the enable pin, shutdown supply current is reduced to 1.3 μA, when the enable pin is low.
Undervoltage lockout (UVLO) is internally set at 2.5 V, but can be increased using the enable pin. The output voltage startup ramp iscontrolled by the slow-start pin that can also be configured for sequencing and tracking. Anopen-drain powergood signal indicates the output is within 94% to 107% of its nominalvoltage.
A wide switching frequency range allows efficiency and external component size to beoptimized. Frequency foldback and thermal shutdown protects the part during an overloadcondition.
The TPS54260 is available in 10-pin thermally enhanced MSOP and 10-pin 3-mm × 3-mm SONPowerPAD packages.
Catalogue
FPGA / CPLD
Memory
MOS 
MCU 
DSP
OCEP
Secondary 
Other 
