• Asynchronous Set-Reset Capability

• Static Flip-Flop Operation

• Medium-Speed Operation: 16 MHz (Typical) Clock Toggle Rate at 10-V Supply

• Standardized Symmetrical Output Characteristics

• Maximum Input Current Of 1-μA at 18 V Over Full Package Temperature Range:

• 100 nA at 18 V and 25°C

• Noise Margin (Over Full Package Temperature Range):

• 1 V at VDD = 5 V

• 2 V at VDD = 10 V

• 2.5 V at VDD = 15 V

The CD4013B device consists of two identical, independent data-type flip-flops. Each flip-flop has independent data, set, reset, and clock inputs and Q and Q output to the data input, for counter and toggle applications. The logic level present at the D input is transferred to the Q output during the positive-going transition of the clock pulse. Setting or resetting is independent of the clock and is accomplished by a high level on the set or reset line, respectively.

The CD4013B types are supplied in 14-pin dual-in-line plastic packages (E suffix), 14-pin small-outline packages (M, MT, M96, and NSR suffixes), and 14-pin thin shrink small-outline packages (PW and PWR suffixes).

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