The PCA9509DP is a level translating I²C-bus/SMBus Repeater enables processor low voltage 2-wire serial bus to interface with standard I²C-bus or SMBus I/O. While retaining all the operating modes and features of the I²C-bus system during the level shifts, it also permits extension of the I²C-bus by providing bi-directional buffering for both the data (SDA) and the clock (SCL) lines, thus enabling the I²C-bus or SMBus maximum capacitance of 400pF on the higher voltage side. Port-A allows a voltage range from 1.35V to VCC(B) 1V and requires no external pull-up resistors due to the internal current source. Port-B allows a voltage range from 3 to 5.5V and is overvoltage tolerant. Both port-A and port-B SDA and SCL pins are high-impedance when the repeater is unpowered.
Feature
Active high repeater enable input
Open-drain inputs/outputs
Lock-up free operation
Supports arbitration and clock stretching across the repeater
Powered-off high-impedance I²C pins
Catalogue
FPGA / CPLD
Memory
MOS 
MCU 
DSP
OCEP
Secondary 
Other 
