The HEF4013BT is a dual D-type Flip-flop features independent set-direct input (SD), clear-direct input (CD), clock input (CP) and outputs (Q, Q\). Data is accepted when CP is low and is transferred to the output on the positive-going edge of the clock. The active high asynchronous CD and SD inputs are independent and override the D or CP inputs. The outputs are buffered for best system performance. The clock input's Schmitt-trigger action makes the circuit highly tolerant of slower clock rise and fall times. It operates over a recommended VDD power supply range of 3 to 15V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS or another input.
Feature
Tolerant of slow clock rise and fall time
Fully static operation
Standardized symmetrical output characteristics
Complies with JEDEC standard JESD 13-B